Reducing the temperature needed for high strength bonding which was and is driven by the need to reduce effects of coefficient of thermal expansion mismatch, reduce thermal budgets, and increase throughput has led to the development of plasma treatment procedures capable of bonding Si wafers below 300 °C with a bond strength equivalent to Si bulk. Despite being widely used, the physical and chemical mechanisms enabling low temperature wafer bonding have remained poorly understood. We developed an understanding of the beneficial surface modifications by plasma and a model based on short range low temperature diffusion through bonding experiments combined with results from spectroscopic ellipsometry, depth resolving Auger electron spectroscopy, and transmission electron microscopy measurements. We also present experimental results showing that even at room temperature reasonable bond strength can be achieved. We conclude that the gap closing mechanism is therefore a process which balances the lowering of the total energy by minimizing the sum of the free surface energy (maximizing the contact area between the surfaces) and strain energy in the oxide at the bond interface.

Manufacturing and integration of MEMS devices by wafer bonding often lead to problems generated by thermal properties of materials. These include alignment shifts, substrate warping and thin film stress. By limiting the thermal processing temperatures, thermal expansion differences between materials can be minimized in order to achieve stress-free, aligned substrates without warpage. Achieving wafer level bonding at low temperature employs a little magic and requires new technology development. The cornerstone of low temperature bonding is plasma activation. The plasma is chosen to compliment existing interface conditions and can result in conductive or insulating interfaces. A wide range of materials including semiconductors, glasses, quartz and even plastics respond favorably to plasma activated bonding. The annealing temperatures required to create permanent bonds are typically ranging from room temperature to 400°C for process times ranging from 15-30 min and up to 2-3 h. This new technique enables integration of various materials combinations coming from different production lines.

Low temperature wafer bonding is a powerful technique for MEMS/MOEMS devices fabrication and packaging. Among the low temperature processes adhesive bonding focuses a high technological interest. Adhesive wafer bonding is a bonding approach using an intermediate layer for bonding (e.g. glass, polymers, resists, polyimides). The main advantages of this method are: surface planarization, encapsulation of structures on the wafer surface, particle compensation and decrease of annealing temperature after bonding. This paper presents results on adhesive bonding using spin-on glass and Benzocyclobutene (BCB) from Dow Chemicals. The advantages of using adhesive bonding for MEMS applications will be illustrated by presenting a technology of fabricating GaAs-on-Si substrates (up to 150 mm diameter) and results on BCB bonding of Si wafers (200 mm diameter).

GaAs-Si low temperature. bonding fas been achieved using spinon-glass as the intermediate layer. Interface energies of ~1.7J/cm2 were obtained after thermal annealing at only 200°C. The interface energy is sufficiently high to allow thinning of the GaAs wafer down to 5-10 u m. Introduction: Much scientific interest is being focused on the monolithic integration of GaAs optoelectronic devices with high speed silicon integrated circuits. The main requirement for the integration is to combine high quality single crystalline GaAs layers with silicon substrates. A GaAs/Si heterostructure would have the advantage of combiig the properties of both Si and GaAs in order to achieve the integration of GaAs optoelectronic devices with silicon signal processing devices on the same chip and also dissipating higher power than those on GaAs substrates due to the three times higher thermal conductivity of silicon [l]. The main objective is to produce a material system in which a thin GaAs layer showing bulk quality is monolithically integrated on an Si substrate. Usually, GaAs layers are fabricated on Si substrates by heteroepitaxial growth. The formation of anti-phase boundaries, 4.1% lattice mismatch between GaAs and Si, and low temperature epitaxy are major problems encountered in this case [2 ,3] Most of these problems can be avoided by using the direct wafer bonding (DWB) technique [ 4 5] to fabricate GaAs/Si heterostructures. By DWB it is possible either to transfer a singlecrystalline (100) GaAs layer on an Si substrate using for instance hydrogen implantation induced splitting [6], or to integrate silicon in the GaAs technology by transferring silicon layers on GaAs wafers [7]. The most difficult problem which has to be overcome in bonding GaAs to Si is the large difference between the thermal expansion coefficients (TECs) of Si and GaAs (the TEC of GaAs is almost twice that of Si) [8, 9].

Wafer bonding became during past decade an important technology for MEMS manufacturing and waferlevel 3D integration applications. The increased complexity of the MEMS devices brings new challenges to the processing techniques. In MEMS manufacturing wafer bonding can be used for integration of the electronic components (e.g. CMOS circuitries) with the mechanical (e.g. resonators) or optical components (e.g. waveguides, mirrors) in a single, wafer-level process step. However, wafer bonding with CMOS wafers brings additional challenges due to very strict requirements in terms of process temperature and contamination. These challenges were identified and wafer bonding process solutions will be presented illustrated with examples.