Optimum Quaternary Galois Field Circuit Design through Carbon Nano Tube Technology

Abstract

The geometry dependant threshold voltage of carbon nanotube FETs (CNFETs), has been often used to design a ternary logic family. However, for the last couple of decades, multiple-valued logic (MVL) such as ternary (base=3) or quaternary (base=4) logic styles has attracted considerable attention. MVL circuits can reduce the number of operations necessary to implement a particular mathematical function and further, have an advantage in terms of reduced area. As we progress into an era of nanotechnology, molecular devices are becoming promising alternatives to the existing silicon technology. Carbon nanotube field effect transistors (CNFETs) are being extensively studied as possible successors to Silicon MOSFETs. Research has started in the earnest to understand the device physics of CNFETs as well as to explore possible circuit applications. Implementable CNTFET circuits have operational characteristics to approach the advantage of using MVL in voltage mode. In this paper through using of CNTFET characteristics, we presented new CNTFET circuit design to implement optimum Quaternary Galois Field logic.

A novel, efficient CNTFET Galois design as a basic ternary-valued logic field

“…20 Ternary Galois field sum of product expressions have been found to be a good choice for ternary reversible logic and particularly for quantum-cascaded realization of ternary functions. 21 The MVL functions should be implemented by a combination of the basic operators in the unique field area. [22][23][24] Although binary Galois field circuits have been investigated by many researchers, not much work has been done on MVL versions of such circuits.…”