Optimum multiplexer design in quantum-dot cellular automata

Alkaldy, Esam; Majeed, Ali H.; Zainal, Mohd Shamian; Nor, Danial Md

doi:10.11591/ijeecs.v17.i1.pp148-155

Cited by 30 publications

(14 citation statements)

References 28 publications

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“…The block diagram that will be followed to design the latch is depicted in Figure 8. Although many multiplexers are presented in QCA literature discussed in [23], the multiplexer structure that will be utilized in this work is proposed in [24]. So, the proposed D latch is illustrated in Figure 9.…”

Section: Proposed Designmentioning

confidence: 99%

Novel Memory Structures in QCA Nano Technology

Majeed

Alkaldy²,

Zainal³

et al. 2020

IJEEE

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Quantum-dot Cellular Automata (QCA) is a new emerging technology for designing electronic circuits in nanoscale. QCA technology comes to overcome the CMOS limitation and to be a good alternative as it can work in ultra-high-speed. QCA brought researchers attention due to many features such as low power consumption, small feature size in addition to high frequency. Designing circuits in QCA technology with minimum costs such as cells count and the area is very important. This paper presents novel structures of D-latch and D-Flip Flop with the lower area and cell count. The proposed Flip-Flop has SET and RESET ability. The proposed latch and Flip-Flop have lower complexity compared with counterparts in terms of cell counts by 32% and 26% respectively. The proposed circuits are designed and simulated in QCADesigner software.

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Section: Proposed Designmentioning

confidence: 99%

Novel Memory Structures in QCA Nano Technology

Majeed

Alkaldy²,

Zainal³

et al. 2020

IJEEE

Self Cite

View full text Add to dashboard Cite

show abstract

“…One of these nanotechnologies that is expected to provide the implementation of low-power, high-density, and high-speed integrated digital circuits is quantum-dot cellular automata (QCA) [7][8][9][10][11][12]. In the literature, many studies have been conducted on developing different QCA designs for various fundamental digital circuits such as Multiplexer (MUX) [13][14][15][16][17][18][19][20][21][22], XOR/XNOR [23], arithmetic circuits [24][25][26][27][28], memory [18], reversible gate [29], etc. If we investigate the development of QCA architectures, the designers used majority logic gates as a fundamental building block for the design of digital circuits.…”

Section: Introductionmentioning

confidence: 99%

Low-Power Multiplexer Structures Targeting Efficient QCA Nanotechnology Circuit Designs

2021

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Quantum-dot cellular automata (QCA) technology is considered to be a possible alternative for circuit implementation in terms of energy efficiency, integration density and switching frequency. Multiplexer (MUX) can be considered to be a suitable candidate for designing QCA circuits. In this paper, two different structures of energy-efficient 2×1 MUX designs are proposed. These MUXes outperform the best existing design in terms of power consumption with approximate reductions of 26% and 35%. Moreover, similar or better performance factors such as area and latency are achieved compared to the available designs. These MUX structures can be used as fundamental energy-efficient building blocks for replacing the majority-based structures in QCA. The scalability property of the proposed MUXes is excellent and can be used for energy-efficient complex QCA circuit designs.

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“…To find replacements for the CMOS technology, many devices and techniques are being introduced and evaluated by researchers, such as Spin-wave architecture, Single-electron devices, Quantum Computing etc. [2], [3]. Among the existing new techniques, CNTFET is one of the demonstrated alternatives to CMOS transistors, which operates satisfactorily [5], [6].…”

Section: Introductionmentioning

confidence: 99%

A Systematic Method to Design Efficient Ternary High Performance CNTFET-Based Logic Cells

2020

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The huge quantity of nodes and interconnections in modern binary circuits leads to extremely high levels of energy consumption. The interconnection complexity and other issues of binary circuits encourage researchers to consider multiple-valued logic (MVL) alternatives. Features of Carbon Nanotube Field-Effect Transistors (CNTFETs) make this technology a potential candidate to implement MVL circuits. In this article, a new systematic methodology is proposed to design ternary logic block circuits based on CNTFETs. The methodology is applied to the design of two basic logic circuits, a half adder and a 1-digit multiplier, which are evaluated through HSPICE simulations. Simulation results indicate improvements over current equivalents in transistor count and PDP mean with the half adder version of 19.2%, and 74.07% respectively, and with the 1-digit multiplier of 24.67% and 81.12% respectively.

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Optimum multiplexer design in quantum-dot cellular automata

Cited by 30 publications

References 28 publications

Novel Memory Structures in QCA Nano Technology

Novel Memory Structures in QCA Nano Technology

Low-Power Multiplexer Structures Targeting Efficient QCA Nanotechnology Circuit Designs

A Systematic Method to Design Efficient Ternary High Performance CNTFET-Based Logic Cells

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