Optimizing sparse matrix-vector multiplication using index and value compression

Kourtis, Kornilios; Goumas, Georgios; Koziris, Nectarios

doi:10.1145/1366230.1366244

Cited by 75 publications

(70 citation statements)

References 28 publications

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“…These patterns include blocks [13], variable or mixtures of differently-sized blocks [12] diagonals, which may be especially wellsuited to machines with SIMD and vector units [32,28], general pattern compression [33], value compression [15], and combinations.…”

Section: Related Workmentioning

confidence: 99%

Reduced-Bandwidth Multithreaded Algorithms for Sparse Matrix-Vector Multiplication

Buluç

Williams

Oliker

et al. 2011

2011 IEEE International Parallel &Amp; Distributed Processing Symposium

109

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Abstract-On multicore architectures, the ratio of peak memory bandwidth to peak floating-point performance (byte:flop ratio) is decreasing as core counts increase, further limiting the performance of bandwidth limited applications. Multiplying a sparse matrix (as well as its transpose in the unsymmetric case) with a dense vector is the core of sparse iterative methods. In this paper, we present a new multithreaded algorithm for the symmetric case which potentially cuts the bandwidth requirements in half while exposing lots of parallelism in practice. We also give a new data structure transformation, called bitmasked register blocks, which promises significant reductions on bandwidth requirements by reducing the number of indexing elements without introducing additional fill-in zeros. Our work shows how to incorporate this transformation into existing parallel algorithms (both symmetric and unsymmetric) without limiting their parallel scalability. Experimental results indicate that the combined benefits of bitmasked register blocks and the new symmetric algorithm can be as high as a factor of 3.5x in multicore performance over an already scalable parallel approach. We also provide a model that accurately predicts the performance of the new methods, showing that even larger performance gains are expected in future multicore systems as current trends (decreasing byte:flop ratio and larger sparse matrices) continue.

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Section: Related Workmentioning

confidence: 99%

Reduced-Bandwidth Multithreaded Algorithms for Sparse Matrix-Vector Multiplication

Buluç

Williams

Oliker

et al. 2011

2011 IEEE International Parallel &Amp; Distributed Processing Symposium

109

View full text Add to dashboard Cite

show abstract

“…The restriction in our implementation is the standard restriction and can be easily used in a matrix-free fashion. At each level, except for l = 0, the coarse grid matrix has to be constructed using the Galerkin method (18).…”

Section: Multigrid Methods Preconditionermentioning

confidence: 99%

“…The simplest example of quantization is rounding a real number to the nearest integer value. A similar idea applied to the lossless compression of the column indices was described in Kourtis et al [18]. The quantization technique can be used to make the matrix elements in different rows similar to each other for better compression.…”

Section: Vcrs Descriptionmentioning

confidence: 99%

Reduction of computing time for least-squares migration based on the Helmholtz equation by graphics processing units

2015

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In geophysical applications, the interest in leastsquares migration (LSM) as an imaging algorithm is increasing due to the demand for more accurate solutions and the development of high-performance computing. The computational engine of LSM in this work is the numerical solution of the 3D Helmholtz equation in the frequency domain. The Helmholtz solver is Bi-CGSTAB preconditioned with the shifted Laplace matrix-dependent multigrid method. In this paper, an efficient LSM algorithm is presented using several enhancements. First of all, a frequency decimation approach is introduced that makes use of redundant information present in the data. It leads to a speedup of LSM, whereas the impact on accuracy is kept minimal. Secondly, a new matrix storage format Very Compressed Row Storage (VCRS) is presented. It not only reduces the size of the stored matrix by a certain factor but also increases the efficiency of the matrix-vector computations. The effects of lossless and lossy compression with a proper choice of the compression parameters are positive. Thirdly, we accelerate the LSM engine by graphics cards (GPUs). A GPU is used as an accelerator, where the data is partially transferred to a GPU to execute a set of operations or as a replacement, where the complete data is stored in the GPU memory. We demonstrate that using the GPU as a replacement leads to Summarizing the effects of each improvement, the resulting speedup can be at least an order of magnitude compared to the original LSM method.

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“…Most of the works focus on the reduction of the amount of data involved in accessing the matrix. These techniques include: (1) Register Blocking and similar ones [5,11,13], (2) sparsity pattern-based compression [4,12], and (3) databased compression [9]. With Register Blocking, small dense blocks of the matrix are recorded and accessed, rather than single elements.…”

Section: Spmv On Gpu-state Of the Artmentioning

confidence: 99%

Performance modeling and optimization of sparse matrix-vector multiplication on NVIDIA CUDA platform

Xue

Lin

2011

J Supercomput

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In this article, we discuss the performance modeling and optimization of Sparse Matrix-Vector Multiplication (SpMV) on NVIDIA GPUs using CUDA. SpMV has a very low computation-data ratio and its performance is mainly bound by the memory bandwidth. We propose optimization of SpMV based on ELLPACK from two aspects: (1) enhanced performance for the dense vector by reducing cache misses, and (2) reduce accessed matrix data by index reduction. With matrix bandwidth reduction techniques, both cache usage enhancement and index compression can be enabled. For GPU with better cache support, we propose differentiated memory access scheme to avoid contamination of caches by matrix data. Performance evaluation shows that the combined speedups of proposed optimizations for GT-200 are 16% (single-precision) and 12.6% (double-precision) for and 15% (double-precision) for GF-100 GPU.

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Optimizing sparse matrix-vector multiplication using index and value compression

Cited by 75 publications

References 28 publications

Reduced-Bandwidth Multithreaded Algorithms for Sparse Matrix-Vector Multiplication

Reduced-Bandwidth Multithreaded Algorithms for Sparse Matrix-Vector Multiplication

Reduction of computing time for least-squares migration based on the Helmholtz equation by graphics processing units

Performance modeling and optimization of sparse matrix-vector multiplication on NVIDIA CUDA platform

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