Optimizing energy to minimize errors in dataflow graphs using approximate adders

Kedem, Zvi M.; Mooney, Vincent J.; Muntimadugu, Kirthi Krishna; Palem, Krishna V.; Devarasetty, Avani; Parasuramuni, Phani Deepak

doi:10.1145/1878921.1878948

Cited by 17 publications

(24 citation statements)

References 12 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…We start with an analysis of approximate RCAs assuming worst-case delays. While we do not have a formal proof to show that consideration of average and best case delays will result in lower error rates, we have found empirically for an RCA fed inputs having a uniform statistical distribution, increasing the delay increases the errors in the adder at least 98% of the time [15]. Fig.…”

Section: B Modeling the Error At The Output Of An Approximate Rcamentioning

confidence: 80%

“…While there can be more than one carry chain in a single addition, it turns out that multiple carry chains cannot overlap [15]. Fig.…”

Section: A Carry Chains In Ripple Carry Addersmentioning

confidence: 99%

“…`/ ; however, for brevity, in this paper we will simply refer to d without specifying all the input values on which d depends. For additional details please refer to [15]. We will determine d ik as a sum of worst case propagation delays of the gates in an RCA.…”

Section: B Modeling the Error At The Output Of An Approximate Rcamentioning

confidence: 99%

See 2 more Smart Citations

An approach to energy-error tradeoffs in approximate ripple carry adders

Kedem¹,

Mooney²,

Muntimadugu³

et al. 2011

IEEE/ACM International Symposium on Low Power Electronics and Design

Self Cite

View full text Add to dashboard Cite

Given a 16-bit or 32-bit overclocked ripple-carry adder, we minimize error by allocating multiple supply voltages to the gates. We solve the error minimization problem for a fixed energy budget using a binned geometric program solution (BGPS). A solution found via BGPS outperforms the two best prior approaches, uniform voltage scaling and biased voltage scaling, reducing error by as much as a factor of 2.58X and by a median of 1.58X in 90nm transistor technology.

show abstract

Section: B Modeling the Error At The Output Of An Approximate Rcamentioning

confidence: 80%

“…While there can be more than one carry chain in a single addition, it turns out that multiple carry chains cannot overlap [15]. Fig.…”

Section: A Carry Chains In Ripple Carry Addersmentioning

confidence: 99%

See 1 more Smart Citation

An approach to energy-error tradeoffs in approximate ripple carry adders

Kedem¹,

Mooney²,

Muntimadugu³

et al. 2011

IEEE/ACM International Symposium on Low Power Electronics and Design

Self Cite

View full text Add to dashboard Cite

show abstract

“…That model requires a high level of redundancy (about 10 3 -10 4 ) that seems unrealistic. Since then, a number of imprecise circuits have been designed for different purposes in various levels of circuit and logic [35], architecture [25], data flow [24] and system. Depending on the desire application, approximate calculations exploit a trade-off between accuracy, efficiency and power consumption.…”

Section: Related Workmentioning

confidence: 99%

Approximate Arithmetic for Low-Power Image Median Filtering

Monajati

Fakhraie

Kabir

2015

Circuits Syst Signal Process

View full text Add to dashboard Cite

In applications related to human senses, such as audio and image processing, computations with limited precision are acceptable. In these areas, a digital system can be implemented using approximate computing that works with sufficient precision. In this paper, we present a method to design 2-bit approximate magnitude comparators that are effectively low cost in terms of power, area and speed. We build larger comparators with adjustable error characteristics. Compared to precise one, our approximate comparators can save power and area up to 7-46 % and 10-50 %, respectively. The structures of our comparators and their error characteristics are presented in this paper. We use these comparators to design different approximate image median filters in order to remove salt and pepper noise. Simulation results show that the output quality of these filters is very similar to that of the precise ones so that the degradation is not noticeable. The approximate filters save up to 30 % of power and area while working 18 % faster than the precise ones.

show abstract

“…In category (C4), existing works assign overscaled supply voltages to achieve a graceful accuracy degradation. Kedem et al [13] analyze propagations of errors induced by the degraded supply voltage, and they simplify the analysis by assuming that no error cancellations occur between multiple adders. Venkatesan et al [25] propose the MACACO flow to evaluate propagations of errors induced by overscaled supply voltage.…”

Section: Analysis and Composition Of Errorsmentioning

confidence: 99%

Statistical analysis and modeling for error composition in approximate computation circuits

Chan

Kahng

Kang

et al. 2013

2013 IEEE 31st International Conference on Computer Design (ICCD)

View full text Add to dashboard Cite

Abstract-Aggressive requirements for low power and high performance in VLSI designs have led to increased interest in approximate computation. Approximate hardware modules can achieve improved energy efficiency compared to accurate hardware modules. While a number of previous works have proposed hardware modules for approximate arithmetic, these works focus on solitary approximate arithmetic operations. To utilize the benefit of approximate hardware modules, CAD tools should be able to quickly and accurately estimate the output quality of composed approximate designs. A previous work [10] proposes an interval-based approach for evaluating the output quality of certain approximate arithmetic designs. However, their approach uses sampled error distributions to store the characterization data of hardware, and its accuracy is limited by the number of intervals used during characterization.In this work, we propose an approach for output quality estimation of approximate designs that is based on a lookup table technique that characterizes the statistical properties of approximate hardwares and a regression-based technique for composing statistics to formulate output quality. These two techniques improve the speed and accuracy for several error metrics over a set of multiply-accumulator testcases. Compared to the interval-based modeling approach of [10], our approach for estimating output quality of approximate designs is 3.75× more accurate for comparable runtime on the testcases and achieves 8.4× runtime reduction for the error composition flow. We also demonstrate that our approach is applicable to general testcases.

show abstract

Optimizing energy to minimize errors in dataflow graphs using approximate adders

Cited by 17 publications

References 12 publications

An approach to energy-error tradeoffs in approximate ripple carry adders

An approach to energy-error tradeoffs in approximate ripple carry adders

Approximate Arithmetic for Low-Power Image Median Filtering

Statistical analysis and modeling for error composition in approximate computation circuits

Contact Info

Product

Resources

About