2009 4th International Symposium on Computational Intelligence and Intelligent Informatics 2009
DOI: 10.1109/isciii.2009.5342264
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Optimizing CMOS current conveyors through meta heuristics

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Cited by 5 publications
(7 citation statements)
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“…Ideal CCIIs are commonly characterized by low impedance on port X and high impedance on ports Y and Z [36].…”
Section: Bicmos Second Generation Current Conveyor (Bicmos-ccii+)mentioning
confidence: 99%
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“…Ideal CCIIs are commonly characterized by low impedance on port X and high impedance on ports Y and Z [36].…”
Section: Bicmos Second Generation Current Conveyor (Bicmos-ccii+)mentioning
confidence: 99%
“…In this section, we present a second-order current-mode band-pass filter based on impedance simulation [10]. The Figure 6 shows the implementation of this filter by using four plus-type current conveyors and two capacitors [36]. The two current conveyors (CCII+ (1) and CCII+ (2)) and capacitor (C1) are equivalent to the non-ideal inductance (i.e., an inductance having a parasitic positive resistance in parallel, see Figure 7.…”
Section: Application: Current-mode Second Order Band Pass Filter Base...mentioning
confidence: 99%
“…Obtained results are compared to the ideal ones and to those obtained using an optimized building cell in [8], respectively. Figure 9 recapitulates these results.…”
Section: B Example #2: a Bi-band Filtermentioning
confidence: 99%
“…This circuit is formed with two CCIIs. The CCII to be used in this inductance is the conventional CCII presented in Figure 8 [8]. …”
Section: Example #3: a Simulated Inductancementioning
confidence: 99%
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