Optimized recess etching criteria for T‐gate fabrication achieving f_t = 290 GHz at L_g = 124 nm in metamorphic high electron mobility transistor with In_0.7Ga_0.3As channel

Abstract

The authors propose criteria for recess etching to fabricate T‐gate used in InGaAs high electron mobility transistors (HEMTs). By patterning additional rectangular pads on the source and drain metals in the e‐beam lithography step, it is possible to measure the drain‐to‐source resistance (Rds) and current (Ids). The ratio (Γ) of before and after etching for each Rds and Ids can be used as criteria to determine the point in time to stop etching. By performing recess etching with Γ= 1.97 for Rds and Γ= 0.38 for Ids on an epiwafer having cap doping concentration of 2 × 1019 cm−3 and channel indium content of 0.7, the authors have fabricated InGaAs metamorphic high electron mobility transistor (mHEMT) device showing gm,max= 1603 mS/mm and ft= 290 GHz at Lg= 124 nm. The criteria presented can be applied to InGaAs HEMTs with various epitaxial structures.