Optimized Memristor-Based Multipliers

Guckert, Lauren; Swartzlander, Earl E.

doi:10.1109/tcsi.2016.2606433

Cited by 49 publications

(44 citation statements)

References 27 publications

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“…This circuit also consists of a load resistor named RG. 18,24,30 There are two types of operations in the logic of implementation: FALSE operation and IMP operation. These control voltages are the voltages of the word line (V1 and V2 mentioned in figure).…”

Section: Memristor Logic Operationsmentioning

confidence: 99%

“…In previous studies, [24][25][26][27]30 different Memristor-based multiplexers are provided. In previous studies, [24][25][26][27]30 different Memristor-based multiplexers are provided.…”

Section: Memristor Logic Operationsmentioning

confidence: 99%

“…24 The advantages of this multiplexer (its size and speed) can create new opportunities to advance the traditional Von Neumann architecture. 30 As the main characteristic of Memristors is their ability to store the final data and also with the help of their logics, it is now possible to design memories capable of computing. Traditional Von Neumann architecture has different components such as processor, controller, memory, and input/output mechanism, but two main parts are the memory and the processor.…”

mentioning

confidence: 99%

“…24,27,30 b. The required number of memristors to design an efficient MUX is reduced in comparison with former best designs in.…”

mentioning

confidence: 99%

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High‐performance digital logic implementation approach using novel Memristor‐based multiplexer

Karimi

Rezai

2019

Circuit Theory & Apps

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This paper presents and evaluates novel approaches to design efficientMemristor-based multiplexers. Three novel algorithms and structures are proposed based on IMP logic operation. These novel algorithms and structures are developed based on Memristors and crossbar Nano wires. The proposed Memristor-based multiplexers can store the output inside the Memristors. So, the proposed multiplexers have the ability to compute in memory. The proposed multiplexers are simulated using Pspice. The number of required Memristors and necessary steps to accumulate the output for the proposed 2 to 1 multiplexers is reduced in comparison with the former best MUXs. Moreover, these novel multiplexers are utilized to design ISCAS'85 benchmark circuits. The results show improvements in terms of total propagation delay and the required layout area. KEYWORDS crossbar arrays, IMPLY logics, Memristors, Multiplexer, nanoscale logic operation | INTRODUCTIONTwo important factors of electronic devices are speed and density. 1-3 For a long time, Field Effect Transistors (FETs) had the frontier in this field, but due to scaling limitation, new designs and methodologies are required. 1-3 Some of these approaches that help to overcome these limitations are hybrid Nano/CMOS technologies, 1-4 Graphene Nanoribbon Field Effect Transistors (GNFETs), Silicon on Insulator Field Effect Transistors (SOIFETs), and Carbon Nano Tube Field Effect Transistors (CNTFETs). 1-3 The most promising approach is considered to be the new Nano/CMOS technology. 5 The basic element in this technology is Memristor, which is capable of being scaled to Nano metric sizes. 6 It can also be utilized as resistive memories due to its resistive performance. 7 These resistive memory arrays are usually integrated upon a CMOS subsystem. [8][9][10][11][12] The hybrid Nano/CMOS technology has helped to improve three main classes: (a) digital analogue programmable systems, 13-15 (b) nonvolatile memories, 14 and neuromorphic computing structure. [16][17][18] Material Implication (IMP) is one of the most recently used Memristor-based logic. Based on the IMP logic, many different logic gates such as NOR-OR, 19,20 AND-NAND 21,22 and XNOR-XOR 23 with different architectures have been designed. Recently with the help of IMP logic operations, new Memristor-based multiplexers are also designed. [24][25][26][27] These new logic operations especially NAND gates and multiplexers can help to further improve many arithmetic and computational structures. This is due to the fact that both of these logic operands are capable of designing universal logic circuits. 24 A universal logic circuit can perform like all of the logic gates operations. 24 The unique characteristic of IMP logic operations is that they utilize only Memristors in their structures. 21 Therefore, due to the scaling capabilities of Memristors, the logic gate and multiplexer design with this method could be scaled to Nano metric sizes. 23 In addition, Memristor-based logics are proven to be faster, because of the fast response of

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Section: Memristor Logic Operationsmentioning

confidence: 99%

“…In previous studies, [24][25][26][27]30 different Memristor-based multiplexers are provided. In previous studies, [24][25][26][27]30 different Memristor-based multiplexers are provided.…”

Section: Memristor Logic Operationsmentioning

confidence: 99%

mentioning

confidence: 99%

“…24,27,30 b. The required number of memristors to design an efficient MUX is reduced in comparison with former best designs in.…”

mentioning

confidence: 99%

See 2 more Smart Citations

High‐performance digital logic implementation approach using novel Memristor‐based multiplexer

Karimi

Rezai

2019

Circuit Theory & Apps

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“…This passive electronic device has generated unprecedented worldwide interest because of its potential applications in signal processing, programmable logic, control system, neural network, brain-computer interface [3], etc.…”

Section: Introductionmentioning

confidence: 99%

Sandwich synchronization of memristor-based hyperchaos systems with time delays

Xiong

et al. 2018

Adv Differ Equ

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In this paper, a memristor-based hyperchaotic system is introduced. Considering time delays between the drive system and the response system in the process of synchronization, this paper designs one kind of flexible sandwich controller, which includes a rest in the sandwich structure, to realize the synchronization between two memristor-based hyperchaotic systems. Based on Lyapunov stability theory, matrix inequality, sandwich control and considering time delays, the exponential synchronization conditions for the memristor-based hyperchaotic systems with time delays via sandwich control are given. Finally, simulation results are displayed to verify the effectiveness and feasibility of this method.

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Memristor‐based logic gate and its application in pulse train controlled Buck converter

et al. 2022

Circuit Theory & Apps

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Memristor (MR) has attractive characteristics of nanoscale volume and low‐power dissipation and hence possesses superiorities in designing integrated‐circuits. In this paper, a flux‐controlled binary MR emulator is proposed and discussed by detailing its constitutive mathematical relation between memristance and magnetic flux. MR based logical gates are then constructed and applied to pulse train (PT) controlled Buck converters to improve its output voltage response performance. In order to suppress low‐frequency voltage oscillation of PT controlled Buck converters in continuous conduction mode (CCM), inductor current based PT (IC‐PT) control method using the MR‐based logic gates is newly proposed and analyzed. The sampled simulation and experimental results reveals that the IC‐PT controlled Buck converter by utilizing MR based logic gates can achieve fast transient response and minimized low‐frequency voltage oscillation in CCM mode.

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Optimized Memristor-Based Multipliers

Cited by 49 publications

References 27 publications

High‐performance digital logic implementation approach using novel Memristor‐based multiplexer

High‐performance digital logic implementation approach using novel Memristor‐based multiplexer

Sandwich synchronization of memristor-based hyperchaos systems with time delays

Memristor‐based logic gate and its application in pulse train controlled Buck converter

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