2018 IEEE 18th International Conference on Nanotechnology (IEEE-NANO) 2018
DOI: 10.1109/nano.2018.8626333
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Optimizations of Negative Capacitance Independent Dual-Gate FinFETs

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“…Also, the improved frequency performance is obtained in NC‐FinFET processor. The optimization of independent dual gate FinFET (IDG‐FinFET) with embedded ferroelectric layer in gate stacks is reported by Bai et al 25 A high ON current, low leakage current, and a reasonable switching ratio is achieved by adjusting the thickness of ferroelectric layer. The electrical properties of negative capacitance (NC) Ge‐FinFET is highlighted in presence of fixed trap charge 26 .…”
Section: Introductionmentioning
confidence: 99%
“…Also, the improved frequency performance is obtained in NC‐FinFET processor. The optimization of independent dual gate FinFET (IDG‐FinFET) with embedded ferroelectric layer in gate stacks is reported by Bai et al 25 A high ON current, low leakage current, and a reasonable switching ratio is achieved by adjusting the thickness of ferroelectric layer. The electrical properties of negative capacitance (NC) Ge‐FinFET is highlighted in presence of fixed trap charge 26 .…”
Section: Introductionmentioning
confidence: 99%