Optimization of Asymmetric π Gate HEMT for Improved Reliability & Frequency Applications

Optimization of π – Gate AlGaN/AlN/GaN HEMTs for Low Noise and High Gain Applications

“…7 are biased at maximum device transconductance (g m(max) ) on similar lines as in [50]. It is observed that the stern stability factor Sehra et al in their earlier work [37] discuss about the enhanced gate action in case of recessed π -Gate architectures. With a 5 nm gate recess, it was demonstrated that when either leg of the 'π' structure is recessed, the enhancement in cut off frequency is more evident in comparison to the case when both the Gate Legs was recessed.…”

“…al. [37] demonstrates better thermal reliability in case of left leg recessed architectures, which further suggests that the thermal noise generation in such architectures would be significantly suppressed owing to their better electronphonon scattering, resulting in an efficient transfer of energy from electrons to the lattice.…”

“…It has already been demonstrated by Alvaro et al [36] and further extended by Sehra et al [37] that the π -Gate architecture exhibits better thermal operation in comparison to T -Gate counterpart and also being less sensitive to the temperature variations as far as cutoff frequency (f T ) and maximum frequency of oscillation (f max ) is concerned. Further, the recessed architecture of π -Gate HEMT has superiority in terms of cutoff frequency (f T ) but demonstrates a degraded thermal operation which although remains similar to T -Gate HEMT.…”

“…Where, f corresponds to the frequency of operation, f T is the cut off frequency of the device, I opt is the optimum drain current (in Amperes) for minimum noise operation, E c is the critical field (in MV/cm), R G and R S are the gate and source resistances (in Ω) respectively. Due to the increased fringing fields contributing to an increased parasitic capacitance in π -Gate [36][37][38], and due to the increased gate resistance as a courtesy of 40 nm spacer layer present between the 'π' architecture legs, the said architecture exhibits degraded NF min in comparison to the T -Gate counterpart. Further, the cut off frequency of the device depends upon the gate feedback capacitance (f T ≈ g m /2πC gg ) and therefore has a major effect on the NF min metrics.…”

“…The author further studies the RF performance of the said device architecture in an asymmetric modification under Class AB operation and concludes that the device demonstrates reliable operation against the hot electron effect with modest tradeoffs on the device performance. The study was further extended by Sehra et al [37][38] to investigate the device performance at higher frequency with regard to the device linearity and its response in presence of the unwanted harmonics that may distort the signal transfer. It was observed that the π -Gate architecture is capable in exhibiting a highly linear operation and shows suppressed response to intermodulation distortion which further suggests the suitability of the said architecture for low noise applications.…”