Conference Record of 1998 IEEE Industry Applications Conference. Thirty-Third IAS Annual Meeting (Cat. No.98CH36242)
DOI: 10.1109/ias.1998.730281
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Optimisation of gate circuit layout to suppress power/drive interaction

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Cited by 13 publications
(4 citation statements)
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“…Due to the common impedance coupling between power and drive conductors and the emitter stray inductances, a parasitic voltage is induced in the gate circuit during switching. This phenomenon leads to an increase of switching losses transitions, is at the origin of EMC problems and it requires to over rate power devices [15].…”
Section: A Magnetic Power/drive Interactionsmentioning
confidence: 99%
See 1 more Smart Citation
“…Due to the common impedance coupling between power and drive conductors and the emitter stray inductances, a parasitic voltage is induced in the gate circuit during switching. This phenomenon leads to an increase of switching losses transitions, is at the origin of EMC problems and it requires to over rate power devices [15].…”
Section: A Magnetic Power/drive Interactionsmentioning
confidence: 99%
“…Figure 15: Measurement waveforms for a planar module For the planar module, interactions between drive circuit and power circuit are clearly demonstrated. That's why a special care and an optimization of the planar power module layout with the minimization of the power/drive circuit coupling is always necessary and has been studied in [15]. With the Chip On Chip structure, a natural decoupling of the power circuit and the control circuit is achieved, simplifying the design while increasing the quality of the module.…”
Section: Vg Lementioning
confidence: 99%
“…The fitness of a layout can only be determined based on the overall evaluation of the parasitic parameters. Literatures [1][2][3][4][5][6][7][8][9] also show that only manual layout designs for power module have been demonstrated so far. The main dissatisfactions with manual layout design are the design speed and the limited choice of candidates.…”
Section: Introductionmentioning
confidence: 98%
“…Due to this amplification, the RF oscillations can become self-sustaining thus further reducing the reliability of the converter. Methods for minimizing RF oscillations of IGBT were presented in literature based on a careful design of PCB layout and gate driver [6]. Moreover, the IGBT amplification phenomena can become relevant if the driver circuit generates high frequency conducted noise components, that can be transferred to the power stage and amplified, generating very high EMI levels.…”
Section: Introductionmentioning
confidence: 99%