Optimal supply and threshold scaling for subthreshold CMOS circuits

Wang, A.; Chandrakasan, Anantha P.; Kosonocky, Stephen

doi:10.1109/isvlsi.2002.1016866

Cited by 142 publications

(84 citation statements)

References 6 publications

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“…The adaptive filter design in [5] proposed dynamic threshold voltage scaling approach to reduce leakage energy through substrate biasing. In [6] the improvement of leakage energy in subthreshold circuits was investigated by simultaneously scaling the supply voltage and threshold voltage.…”

Section: Introduction and Related Workmentioning

confidence: 99%

Subthreshold FIR Filter Architecture for Ultra Low Power Applications

Mishra

Al-Hashimi

2009

Lecture Notes in Computer Science

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Abstract. Subthreshold design has been proposed as an effective technique for designing signal processing circuits needed in wireless sensor nodes powered by sources with limited energy. In this paper we propose a subthreshold FIR architecture which brings the benefits of reduced leakage energy, reduced minimum energy point, reduced operating voltage and increased operating frequency when compared with recently reported subthreshold designs. We shall demonstrate this through the design of a 9-tap FIR filter operating at 220mV with operational frequency of 126kHz/sample consuming 168.3nW or 1.33pJoules/sample. Furthermore, the area overhead of the proposed method is less than that of the transverse structure often employed in subthreshold filter designs. For example, a 9-tap filter based on transverse structure has 5× higher area than the filter designed using our proposed method.

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Section: Introduction and Related Workmentioning

confidence: 99%

Subthreshold FIR Filter Architecture for Ultra Low Power Applications

Mishra

Al-Hashimi

2009

Lecture Notes in Computer Science

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“…The digital blocks (FIFO, rate controller and encoder, comparator, PWM of the DC-DC converter) were modelled in VHDL. The delay, TDC, power transistor array, ring oscillator and a capacitive load (ring oscillator [14]) have been modeled using spice with 0.13μm CMOS foundry transistor models based on ST process (Fig.5). Several A-D and D-A VHDL-AMS models were inserted for communication between the digital and analog blocks of the controller.…”

Section: Resultsmentioning

confidence: 99%

“…Performing the corner analysis one guarantees correct operations considering both local and global variations. To study the effect of variations on the MEP that is dependent on V dd , switching activities, process and temperature, we have performed spice simulations on the circuit discussed in [14]. The circuit is a ring oscillator with NAND gates.…”

Section: Effect Of Process and Temperature Variations In Subthresmentioning

confidence: 99%

Variation resilient adaptive controller for subthreshold circuits

Mishra

Al-Hashimi

Zwoliński

2009

2009 Design, Automation &Amp; Test in Europe Conference &Amp; Exhibition

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Abstract-Subthreshold logic is showing good promise as a viable ultra-low-power circuit design technique for powerlimited applications. For this design technique to gain widespread adoption, one of the most pressing concerns is how to improve the robustness of subthreshold logic to process and temperature variations. We propose a variation resilient adaptive controller for subthreshold circuits with the following novel features: new sensor based on time-to-digital converter for capturing the variations accurately as digital signatures, and an all-digital DC-DC converter incorporating the sensor capable of generating an operating operating V dd from 0V to 1.2V with a resolution of 18.75mV, suitable for subthreshold circuit operation. The benefits of the proposed controller is reflected with energy improvement of upto 55% compared to when no controller is employed. The detailed implementation and validation of the proposed controller is discussed.

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“…One effective way of reducing the power consumption of a digital CMOS VLSI circuit is to scale down the V dd supply voltage, which reduces both active energy and leakage power. For some emerging applications, such as implantable devices, medical instruments and wireless sensor networks, the supply voltage may be scaled down to the subthreshold region to prolong battery life [1,2]. However, reducing supply voltage causes a substantial speed penalty, since the drain-source voltage and gate-source voltage of CMOS transistors are simultaneously reduced, leading to significant degradation of driving current and switching speed.…”

Section: Introductionmentioning

confidence: 99%

Energy Efficient Bootstrapped CMOS Large RC-Load Driver Circuit for Ultra Low-Voltage VLSI

Chuang

2012

JLPEA

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This paper presents an energy efficient bootstrapped CMOS driver to enhance the switching speed for driving large RC load for ultra-low-voltage CMOS VLSI. The proposed bootstrapped driver eliminates the leakage paths in the conventional bootstrapped driver to achieve and maintain more positive and negative boosted voltage levels of the boosted nodes, thus improving boosting efficiency and enhancing driver switching speed. Measured performance from test chips implemented with UMC 65 nm low-power CMOS technology (VTN ≈ VTP ≈ 0.5 V) indicates that the proposed driver provides a rising-delay improvement of 37%-50% and a falling-delay improvement of 25%-47% at 0.3 V for a loading ranging from a 0 to 24 mm long M6 metal line compared with the conventional bootstrapped driver. Although designed and optimized for subthreshold ultra low-voltage operation, the proposed bootstrapped driver is shown to be advantageous at higher nearly-threshold supply voltage as well. The proposed driver provides a rising delay improvement of 20% to 52% and a falling delay improvement of 23%-43% for VDD ranging from 0.3 V to 0.5 V, while consuming about 15% less average power than the conventional bootstrapped driver driving a 16 mm long M6 wire.

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Optimal supply and threshold scaling for subthreshold CMOS circuits

Cited by 142 publications

References 6 publications

Subthreshold FIR Filter Architecture for Ultra Low Power Applications

Subthreshold FIR Filter Architecture for Ultra Low Power Applications

Variation resilient adaptive controller for subthreshold circuits

Energy Efficient Bootstrapped CMOS Large RC-Load Driver Circuit for Ultra Low-Voltage VLSI

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