Optical Interconnects and Extreme Computing

Abstract

order-creating-national-strategic-computing-initiative Some believe that interconnects inevitably will need to employ WDM and integrated photonics, because of the scale promised by these technologies.

Attojoule Optoelectronics for Low-Energy Information Processing and Communications

“…At the time of writing this review, we are approximately at the point where, with current and emerging technology, optics is poised to provide at least modest energy reductions for data links compared to electrical approaches, even for relatively short links between cabinets and in backplanes or module connections [14], [15], [16], [17], [18], [19], [20].…”

“…Energy per bit References and notes Wireless data 10 -30μJ [31] Internet: access 40 -80nJ [8]; (a),(b) Internet: routing 20nJ [9]; (c) Internet: optical WDM links 3nJ [32]; (d) Reading DRAM 5pJ [5]; (e) Communicating off chip 1 -20 pJ [5], [15], [16] Data link multiplexing and timing circuits ~ 2 pJ [24] Communicating across chip 600 fJ [5]; (f) Floating point operation 100fJ [5]; (g) Energy in DRAM cell 10fJ [33]; (h) Switching CMOS gate ~50aJ -3fJ [4], [6], [34], [35]; (i) 1 electron at 1V, or 1 photon @1eV 0.16aJ (160zJ) WDM -wavelength division multiplexing DRAM -dynamic random-access memory CMOS -complementary metal-oxide-semiconductor transistor (a) Uses projections to 2016 from [8] (b) Presumes wired connections (optical or electrical) to the network (c) Total for 20 "hops" per internet connection, and derating energies from the 2008 numbers in [9] using a factor of 0.74 per year (from [8]) for improved electronics energy efficiency. (d) Total for 20 "hops" per internet connection, and using projections to 2016 in [32] (e) Rounded sum of the DRAM access and interface energies as projected for 2017 in [5], for off-chip DRAM (f) Based on 2017 projects in [5] for a 10mm line on the chip (g) Double-precision fused multiply-add (floating-point) operation using the projection in [5] of ~ 6.5 pJ in 2017 for this 64-bit operation to calculate energy per bit.…”

Integration of 2D materials on a silicon photonics platform for optoelectronics applications

“…Picosecond response times in few-layer WSe 2 have been observed with autocorrelation measurements where the photo-excited carriers were extracted vertically using a van der Waals heterostructure [36]. In this design, the channel length is limited by the thickness of the WSe 2 rather than the spacing between two lateral electrodes.…”

“…Relatedly, the demand for data storage and high-performance computing continues to grow at an exponential rate [2], keeping in step with Moore's law. This requires much higher bandwidth density for inter-chip communication than ever before (expected to surpass 40 Gbps per interconnect by 2020 [1]).…”

All-Optical Frequency Processor for Networking Applications

“…Amid the persistent growth of data traffic and computational demands throughout the globe, photonic technologies are increasingly called upon to supplant electronic signal processing. Given the intrinsically high bandwidth available to optical carriers-coupled with low-loss transmission in optical fibers-photonics has successfully expanded into a variety of communications contexts, from long-haul spans to metro-area networks, datacenters [1,2], and high-performance computing (HPC) [3][4][5][6]. As performance at the single-core level has plateaued in recent years, parallel architectures now lead the way in HPC, so that data movement dominates much of the total power budget and thus can be viewed as perhaps the main hurdle on the path toward the Exascale regime (10 18 FLOPs/second) [4].…”