Operation of Silicon Carbide BJTs Free from Bipolar Degradation

Abstract

The mechanisms of bipolar degradation in silicon carbide BJTs are investigated and identified. Bipolar degradation occurs as result of stacking fault (SF) growth within the low-doped collector region. A stacking fault blocks vertical current transport through the collector, driving the defective region into saturation. This results in considerable drop of emitter current gain if the BJT is run at a reasonably low collector-emitter bias. The base region does not play any significant role in bipolar degradation. Long-term stress tests have shown full stability of large-area high-power BJTs under minority carrier injection conditions provided the devices are fabricated using low Basal Plane Dislocation (BPD) material. However, an approximately 20% current gain compression is observed for the first 30-60 hours of burn-in under common emitter operation, which is related to instability of surface recombination in the passive base region.

Stability of Electrical Characteristics of SiC “Super” Junction Transistors under Long-Term DC and Pulsed Operation at various Temperatures

“…The higher junction temperatures resulting from operating the SJT at either a higher base-plate temperature or a higher duty cycle/lower frequency increases the capturing efficiency of these traps, which results in a greater current gain compression. The absence of a quasi-saturation region in the output characteristics after the long-term operation also suggest that the positive V F shift observed after the long-term operation is associated with the reduced emitter injection efficiency of the GateSource p-n junction, and is not due to the presence of basal plane dislocations in the lightly doped n-drift layer, as observed by Konstantinov et al [3].…”

“…On the other hand, the 5.8 hour DC test at a base-plate temperature of 125 °C resulted in a finite increase of the V F by 300 mV at a Drain current of 5 A. However, no quasisaturation region was detected in the output characteristics, as observed in [3] DC versus pulsed current long-term operation: It was reported in [6] that the same charge passing through a SiC PiN diode as a DC or pulsed current causes fundamentally different V F shifts, with the pulsed current causing smaller V F shifts than the DC current. In this work, selected SiC SJTs were subjected to long-duration, 5 A DC or pulsed currents, applied with a pulse width of 30 µs, and at a switching frequency of 14.3 kHz and at a case temperature of 125 °C.…”

“…There are several publications [2,3,4,5] that discuss the stability of the current gain (β) and on-state voltage drop (V F ) of SiC BJTs, when the devices are subjected to long-term openCollector or common-Source operation. These reports contain conflicting results ranging from near-perfect β and V F stability to significant gain compression.…”

Characterization of the Stability of Current Gain and Avalanche-Mode Operation of 4H-SiC BJTs

“…7(b) and (c)]. According to Konstantinov et al [3], the absence of a quasi-saturation region in the post-test characteristics indicates that the observed V F increase is not due to carrier trapping by BPDs in the lightly doped n-drift layer.…”

“…A simulation-focused study [2] attributed the cause for the observed current gain compression in SiC BJTs to electrical carrier traps in the base-emitter space charge region or in the bulk of the quasi-neutral base layer. Another study [3] ascribed the current gain compression to basal plane dislocations (BPDs) in the base and/or collector regions. Ghandi et al reported [4] significant current gain degradation for 3-mm 2 SiC BJTs but nearly stable β for smaller Manuscript area (0.04 mm 2 ) devices, when the devices were subjected to long-term operation.…”