1990
DOI: 10.1109/43.46777
|View full text |Cite
|
Sign up to set email alerts
|

OPASYN: a compiler for CMOS operational amplifiers

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
2
1
1
1

Citation Types

0
103
0

Year Published

1992
1992
2024
2024

Publication Types

Select...
6
4

Relationship

1
9

Authors

Journals

citations
Cited by 314 publications
(106 citation statements)
references
References 18 publications
0
103
0
Order By: Relevance
“…The general purpose optimization codes NPSOL [3] and MINOS are used in, e.g., [4,5]. Other CAD methods based on classical optimization methods, and extensions such as a minimax formulation, include OPASYN [6], OAC [7], and STAIC [8]. These classical methods can be used with complicated circuit models, including full SPICE simulations in each iteration, as in DELIGHT.SPICE [9].…”
Section: Classical Optimization Methodsmentioning
confidence: 99%
“…The general purpose optimization codes NPSOL [3] and MINOS are used in, e.g., [4,5]. Other CAD methods based on classical optimization methods, and extensions such as a minimax formulation, include OPASYN [6], OAC [7], and STAIC [8]. These classical methods can be used with complicated circuit models, including full SPICE simulations in each iteration, as in DELIGHT.SPICE [9].…”
Section: Classical Optimization Methodsmentioning
confidence: 99%
“…As an illustration I will discuss OPASYN [8], a program that produces custom-made IC (integrated circuit) layouts of an operational amplifier (op-amp) tailored to a particular application. A typical op-amp may have anywhere from a 20 to more than a hundred discrete circuit elements (transistors, resistors, capacitors…”
Section: Automated Layout Of Operational Amplifiersmentioning
confidence: 99%
“…This formulation offers fast performance evaluation which is conducive to aggressive search over the entire candidate solution space. A number of optimization strategies have been attempted with equation-based techniques, including numerical search [10][2], combinatorial search [14], hierarchical systems that attempt to decompose the evaluation and optimization [5], qualitative and fuzzy reasoning techniques [25], and geometric programming [6]. However, creating a model that captures the behavior of a circuit topology as a set of compact, closed form, analytical equations for performance evaluation is prohibitively time consuming, indeed, often more time consuming than manually designing the circuit.…”
Section: Review Of Prior Approachesmentioning
confidence: 99%