On the use of vias in conductor-backed coplanar circuits

Abstract

Ground planes of conductor-backed coplanar waveguides (CBCPWs) behave like overmoded patch antennas supporting parallel-plate modes and show numerous resonances. For typical monolithic-microwave integrated-circuit chip sizes, these unwanted resonance frequencies lie within the microwave and millimeter-wave frequency region. Due to this feedback mechanism, today's coplanar millimeter-wave amplifiers operating up to 250 GHz require special packaging techniques for stable operation. The use of vias is one method of suppressing parallel-plate modes. The effect of via-holes within a ground plane and the effect of an open or a shorted ground-plane periphery on the parallel-plate modes of CBCPWs were investigated in depth up to 200 GHz for quartz and GaAs substrates. It is shown that the placement of the vias within the coplanar-waveguide structure is crucial for the suppression of parallel-plate modes. If properly placed, vias are an effective means to suppress these unwanted modes over a chosen frequency range

Novel Wideband Multilayer Butler Matrix Using Cb-CPW Technology

“…Considering the dimensions of the proposed Butler matrix, it was verified that the lowest order mode resonance frequency has been shifted to a higher frequency regime. In this case, it can be noted that the leaky wave phenomenon does not affect the performance of the proposed Butler matrix, thus avoiding use of vias [24].…”

A Wideband 77-GHz, 17.5-dBm Fully Integrated Power Amplifier in Silicon

“…2, is used for impedance matching. The use of vias to connect back and side ground planes eliminates unwanted parallel-plate modes [21]. Fig.…”

Design methodology for wireless nodes with printed antennas

“…The bottom layer is used as the ground plane and must be kept free of large holes when traces must be routed on it. Like most multi-layered boards, these two layers can act as a microstrip patch antenna and can generate undesired radiation [6,12,13]. To avoid this problem, the filled areas of the top layer are stitched with the bottom ground plane using vias.…”

“…The effectiveness of the vias depends on their placements on the PCB. They must be placed near the edges of the two conducting layers to suppress parallel-plate modes and fringing fields of the unwanted patch antenna [6]. The vias should be placed apart less than half wavelength to avoid resonance [12].…”