2014
DOI: 10.1109/tc.2014.2345410
|View full text |Cite
|
Sign up to set email alerts
|

On the Interplay Between Global DVFS and Scheduling Tasks With Precedence Constraints

Abstract: Many multicore processors are capable of decreasing the voltage and clock frequency to save energy at the cost of an increased delay. While a large part of the theory oriented literature focuses on local dynamic voltage and frequency scaling (local DVFS), where every core's voltage and clock frequency can be set separately, this article presents an in-depth theoretical study of the more commonly available global DVFS that makes such changes for the entire chip. This article shows how to choose the optimal cloc… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
3
1
1

Citation Types

0
36
0

Year Published

2014
2014
2019
2019

Publication Types

Select...
4
3
1

Relationship

1
7

Authors

Journals

citations
Cited by 32 publications
(36 citation statements)
references
References 34 publications
0
36
0
Order By: Relevance
“…According to LPT [5] and the way of choose optimal frequency [1] the energy consumption of T1 E1 = 18.196. After the preprocessing of the task T1 change to T2 the energy consumption E2 = 16.017, reduced by 12%.…”
Section: Preprocessing Algorithmmentioning
confidence: 99%
See 1 more Smart Citation
“…According to LPT [5] and the way of choose optimal frequency [1] the energy consumption of T1 E1 = 18.196. After the preprocessing of the task T1 change to T2 the energy consumption E2 = 16.017, reduced by 12%.…”
Section: Preprocessing Algorithmmentioning
confidence: 99%
“…Marco E.T. Gerards et al [1] show how to choose the optimal clock frequencies that minimize the energy for global DVFS, and they discuss the relationship between scheduling and optimal global DVFS. With the techniques an energy consumption reduction of 30% can be achieved.…”
Section: Introductionmentioning
confidence: 99%
“…For example, Zhu et al in [79] integrated an EDF scheduler with a DVFS controller to prolong battery life of embedded systems. Gerards et al in [23] studied the relation between globally…”
Section: Dynamic Voltage and Frequency Scaling In Real-time Embedded mentioning
confidence: 99%
“…In our previous research [15], we study a simplified realtime system with precedence constraints, where all tasks arrive when the application begins and a single deadline for the entire application is used. In that research, we already prove that optimal scheduling for a restricted version of the real-time system that we consider in the current paper is NP-hard.…”
Section: Introductionmentioning
confidence: 99%
“…For these kinds of systems, they show how the optimal clock frequencies depend on the amount of parallelism in an application. It was proven [15], [17], that when at time t 1 there are n active cores and at time t 2 there are m active cores, the ratio between the optimal clock frequencies is α m/n (for some constant α to be discussed). We use this factor in a substitution of variables to transform our multiprocessor problem to an equivalent single core problem.…”
Section: Introductionmentioning
confidence: 99%