On the influence of static power consumption in multicore embedded systems

Lorenzon, Arthur F.; Márcia, C.; Beck, Antonio Carlos Schneider

doi:10.1109/iscas.2015.7168898

Cited by 16 publications

(5 citation statements)

References 11 publications

(12 reference statements)

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“…We used power and performance as design metrics to evaluate the microarchitecture configurations for both lowpower and high-performance optimized processors. We used normalized value of total dynamic power and leakage power [28] across all the cores in the processor as the power metric and the normalized value of total execution time as the performance metric. We used the weights presented in Table III to specify the preference for the conflicting design metrics of power and performance.…”

Section: Methodsmentioning

confidence: 99%

Selecting Microarchitecture Configuration of Processors for Internet of Things (IoT)

Kansakar

Munir

2018

IEEE Trans. Emerg. Topics Comput.

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The Internet of Things (IoT) makes use of ubiquitous internet connectivity to form a network of everyday physical objects for purposes of automation, remote data sensing and centralized management/control. IoT objects need to be embedded with processing capabilities to fulfill these services. The design of processing units for IoT objects is constrained by various stringent requirements, such as performance, power, thermal dissipation etc. In order to meet these diverse requirements, a multitude of processor design parameters need to be tuned accordingly. In this paper, we propose a temporally efficient design space exploration methodology which determines power and performance optimized microarchitecture configurations. We also discuss the possible combinations of these microarchitecture configurations to form an effective two-tiered heterogeneous processor for IoT applications. We evaluate our design space exploration methodology using a cycle-accurate simulator (ESESC) and a standard set of PARSEC and SPLASH2 benchmarks. The results show that our methodology determines microarchitecture configurations which are within 2.23%-3.69% of the configurations obtained from fully exhaustive exploration while only exploring 3%-5% of the design space. Our methodology achieves on average 24.16× speedup in design space exploration as compared to fully exhaustive exploration in finding power and performance optimized microarchitecture configurations for processors.Index Terms-Internet of Things (IoT), design space exploration, microarchitecture, tunable processor parameters, cycle-accurate simulator (ESESC), PARSEC and SPLASH2 benchmarksThe authors are with the

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Section: Methodsmentioning

confidence: 99%

Selecting Microarchitecture Configuration of Processors for Internet of Things (IoT)

Kansakar

Munir

2018

IEEE Trans. Emerg. Topics Comput.

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“…To satisfy these requirements, the structure of the signal processing hardware has been modified in the past to reduce power consumption [ 24 , 25 ]. Recently, the trend is to reduce power consumption with a low-power operation algorithm and efficient data processing [ 26 , 27 , 28 ].…”

Section: Related Workmentioning

confidence: 99%

Accuracy–Power Controllable LiDAR Sensor System with 3D Object Recognition for Autonomous Vehicle

Lee

Choi

et al. 2020

Sensors

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Light detection and ranging (LiDAR) sensors help autonomous vehicles detect the surrounding environment and the exact distance to an object’s position. Conventional LiDAR sensors require a certain amount of power consumption because they detect objects by transmitting lasers at a regular interval according to a horizontal angular resolution (HAR). However, because the LiDAR sensors, which continuously consume power inefficiently, have a fatal effect on autonomous and electric vehicles using battery power, power consumption efficiency needs to be improved. In this paper, we propose algorithms to improve the inefficient power consumption of conventional LiDAR sensors, and efficiently reduce power consumption in two ways: (a) controlling the HAR to vary the laser transmission period (TP) of a laser diode (LD) depending on the vehicle’s speed and (b) reducing the static power consumption using a sleep mode, depending on the surrounding environment. The proposed LiDAR sensor with the HAR control algorithm reduces the power consumption of the LD by 6.92% to 32.43% depending on the vehicle’s speed, compared to the maximum number of laser transmissions (Nx.max). The sleep mode with a surrounding environment-sensing algorithm reduces the power consumption by 61.09%. The algorithm of the proposed LiDAR sensor was tested on a commercial processor chip, and the integrated processor was designed as an IC using the Global Foundries 55 nm CMOS process.

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“…Fellows et al [20] compare the performance and energy consumption of OpenMP and Intel TBB (Threading Building Blocks) on embedded processors. Lorenzon, et al [21], [22] show the impact of OpenMP applications on the static power consumption of the processor and memory system. Wang et al [23] investigate the energy consumption of parallel applications implemented with OpenMP on the Intel Haswell processor microarchitecture.…”

Section: B) Comparison Between Parallel Programming Interfacesmentioning

confidence: 99%

The Impact of Parallel Programming Interfaces on the Aging of a Multicore Embedded Processor

Vieira

Souza

Marques

et al. 2019

2019 IEEE International Symposium on Circuits and Systems (ISCAS)

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In order to meet the increasing performance demand of applications, the amount of cores in a single chip package has been increasing. However, the heat has been rising at a higher scale, which accelerates the aging process in modern processors. Therefore, wisely balancing the use of resources is important to extend its longevity. Frequency performance stagnates after a certain amount of concurrent threads starts executing. In such cases, the only result is a temperature rise that directly influences the aging process, reducing the processor lifetime. This unbalance between threads can be originated from many factors, which includes the way threads communicate and synchronize. Considering that those characteristics are related to the Parallel Programming Interface (PPI) used to parallelize the application, this work proposes to evaluate three widely used PPIs executing on an embedded multicore. We show that, depending on the characteristic of the application, by only switching from one PPI to another, it is possible to reduce the effects of aging. For that, we have developed a model based on the Arrhenius equation. We show that OpenMP has a lower impact on the processor aging for memory-bound applications: up to 38% and 68% lower than PThreads and MPI, respectively. On the other hand, PThreads presents the lowest impact on the processor aging for CPU-bound applications.

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On the influence of static power consumption in multicore embedded systems

Cited by 16 publications

References 11 publications

Selecting Microarchitecture Configuration of Processors for Internet of Things (IoT)

Selecting Microarchitecture Configuration of Processors for Internet of Things (IoT)

Accuracy–Power Controllable LiDAR Sensor System with 3D Object Recognition for Autonomous Vehicle

The Impact of Parallel Programming Interfaces on the Aging of a Multicore Embedded Processor

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