On-line [T<inf>J</inf>, V<inf>ce</inf>] monitoring of IGBTs stressed by fast power cycling tests

Abstract

This paper describes a part of a larger supervision system able to monitor the on-state voltage V CE and the junction temperature T J of IGBT in operation. That system is associated to an ageing test bench stressing IGBT modules by power cycling. All along the ageing test, it is necessary to supervise V CE , always measured in the same conditions of junction temperature and collector current, in order to detect possible degradations of wire bonds and/or emitter metallization. In addition, the thermal swing amplitude of the power cycling must be adjusted to realize a given ageing protocol. That requires measuring the junction temperature evolution on a power cycle to choose the initial electrical conditions providing the wished temperature swing and then, to regularly verify the stability of this thermal stress during the ageing test. The temperature measurement needed for both monitoring is carried out by means of V CE measurement at low current level (100mA), that intrinsic on-stage voltage being a well-known thermo sensitive parameter. The first section describes briefly the ageing test bench, that places the power IGBT modules in operating conditions close to those of real world (PWM operations), and presents the thermal stress protocol applied to the devices, the aim being to define the context in which the measurements have to be made. The second section presents, on the one hand, the principle of an automated measurement of V CE (100A-125°C), made in steady-state, to detect a possible degradation of the top part of IGBT dies, on the other hand, the dynamic measurement of the junction temperature in operation, i.e. in power cycling conditions generated by the PWM modulation. In both cases, experimental results are shown that demonstrate the feasibility and the good accuracy of these monitoring methods.

IGBT Power Stack Integrity Assessment Method for High-Power Magnet Supplies

“…Another contribution in the literature [13] proposes the circuit of Fig. 2(b), where the DUT disconnection is achieved by adding four switches.…”

“…Two of the switches isolate the load during the inverter current interruption and the two other switches allow the load current to freewheel during the interruption. Using the same principle as in [13], the method in [14] combines the V ce methods with sensing and load current for aging detection due to bond-wire lift-off or solder delamination. In this case, the calculation of the thermal resistance for the aging evaluation requires measurements with sinusoidal current at level close to the nominal ratings, at the same temperature conditions, and an extra sensor at baseplate level.…”

“…(a) Power circuit with additional high-current source and relays for the V ce method with sensing and load current [2]. (b) Power circuit with current redirection for the V ce method with sensing and load current [13]. (c) Power circuit with test inductor only for the V ce method with load current in the ZTC operating region [15].…”

Junction temperature estimation method for a 600 V, 30A IGBT module during converter operation

“…In such a paper, it is concluded that the onstate collector-emitter voltage (V CE_ON ) calibrated at low currents seems to be the most suitable TSEP. However, this method is unsuitable for converter applications because the converter operation has to be interrupted in order to do that [8]. If the V CE_ON at high currents is used as TSEP, the junction temperature could be estimated without any interruptions during normal operations.…”

VDMOS electrical parameters potentially usable as mechanical state indicators for power VDMOS assemblies

“…Nowadays, for device ageing studies in a laboratory, electrical measurements of device parameters are often used as an indicator of device ageing. Table 1 shows that for most of the degradation modes, on‐state resistance variation and junction temperature increase are frequently observed [6, 7]. For that purpose, smart metal‐oxide semi‐conductor (MOS) technology integrates sensors that permit to measure the on‐state resistance and junction temperature of the device.…”