On-line scheduling of hard real-time tasks on variable voltage processor

Abstract

We consider the problem of schtifing the mixed worMoad of both sporadic (on-fine) and periodic (off-fine) tasks on variable voltage processor to optimize power consumption while ensuring thatp eriodic tasks meet their destines and to accept as many sporadic tasks, which can be guaranteed to meet their destines, as possible. The proposed efficient dgonthms restit in the scheduling solutions, which are very close to the minimum bound achievable with the dynamictiy variable voltage approach. The effectiventis of the proposed dgonthrns is shown on extensive experiments with rd-fife design examples. hhoductionThe growing class of portable systems, such as persomd computing and communication devices, demands data-and computationintensive tictionrdities with low power consumption. h this paper, we target synthwis of application-specific system-on-chip with variable voltage processor core, mrtitiy focusing on procasor power optimization. The distribution of power dissipation by the components of application-specific system-on-chip depends on the actuã pplications running on the system. However, extensive studies indicate that the power consumption of the processor accounts for significant portion of the oveti power consumption [1].The most effective way to reduce power consumption of a processor core in CMOS technology is to lower the supply voltage level, which exploits the quadratic dependence of power on voltage [2]. Reducing the supply voltage however incraes circuit delay and decrwes clock speed. The restiting processor core consumes lower average power while meeting the deafines. Unfortunately, this technique is ineffective when tight dmtines are present in systems. Another power optimization technique for processor cores is the prdctive system shutdown [7, 14]. The prdctive system shutdown technique, though usable even in the presence of tight deafines, is inferior to the supply voltage reduction technique for the cases when both twhniques can be appfied. The fimitations of the techniques arise due to the fact that systems are designed with a fixed supply voltage. The supply voltage reduction technique attempts to find a sin~e optimal voltage level for the entire processor operation, while the pr~ctive system shutdown technique makw a binary mntime dtision whether to turn on or off the power supply.Recent advances in power supply technology rdong with custom and commercird CMOS chips that are capable of operating reliably over a range of supply voltages make it possible to create processor cores with supply voltage that can be varid at mn time according to application timing constraints [12, 15]. The variable voltage processor core can operate at different optimal points rdong its power vs. speed curve in order to achieve much higher energy efficiency than existing techniques for a wider class of applications.

Feedback EDF Scheduling of Real-Time Tasks Exploiting Dynamic Voltage Scaling

“…The potential to save energy by combining DVS techniques with operating system scheduling has been demonstrated by prior work, and significant savings have been reported for general-purpose computing systems (Govil et al, 1995;Grunwald et al, 2000;Krishna and Lee, 2000;Lorch and Smith, 2001;Pering et al, 1995;Weiser et al, 1994;Pouwelse et al, 2000;Gruian and Kuchcinski, 2001) as well as real-time systems (Hong et al, 1998a;Hong et al, 1998b;Lee and Krishna, 1999;Shin et al, 2000;Pillai and Shin, 2001; D. Shin and Lee, 2001;Mosse et al, 2000;Gruian, 2001;Aydin et al, 2001;Kang et al, 2002). However, pure DVS techniques do not perform well for dynamic systems where the system workloads vary significantly.…”

Energy Characterization of Embedded Real-Time Operating Systems

“…In addition, a considerable amount of work has been done in the area of energy efficient scheduling for real time operating systems [8] [3]. In spite of this, the need of an energy characterization of an RTOS is a relatively new concern.…”

An integrated approach for applying dynamic voltage scaling to hard real-time systems

“…DVS for nonpreemptible tasks is discussed in [8]. DVS for sporadic tasks is discussed in [9]. DVS for tasks with different power consumption characteristics is discussed in [1].…”

“…When a DVS algorithm reduces CPU speed to save energy, it must guarantee that all jobs still meet their deadlines. In the past few years, a large number of algorithms are proposed, e.g., [23,8,9,10,21,1,11,5,6,18,19,25,12,20,24]. Although these algorithms have demonstrated the benefits of applying DVS to hard real-time systems, they generally only apply to some specific real-time scheduler.…”