On-Chip Optical Interconnect

Ohashi, Keisuke; Nishi, Kenichi; Shimizu, Takanori; Nakada, Masafumi; Fujikata, Junichi; Ushida, Jun; Torii, Sunao; Nose, Keisuke; Mizuno, Masayuki; Yukawa, Hiroaki; Kinoshita, Moto; Suzuki, N.; Gomyo, Akiko; Ishi, Tsutomu; Okamoto, Daisuke; Furue, Katsuya; Ueno, Toshihide; Tsuchizawa, Tai; Watanabe, Toshio; Yamada, Koji; Itabashi, S.; Akedo, Jun

doi:10.1109/jproc.2009.2020331

Cited by 134 publications

(52 citation statements)

References 36 publications

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“…In recent years there has been extensive ongoing research in the field of optical interconnects [1][2][3]. However, an integrated laser-on-a-chip still faces the bottleneck of different substrate materials typically used in current industrial processes for lasers and transistor structures.…”

Section: Introductionmentioning

confidence: 99%

“…However, an integrated laser-on-a-chip still faces the bottleneck of different substrate materials typically used in current industrial processes for lasers and transistor structures. There are different approaches proposed to combine these substrates such as flip chip [2,4] or wafer bonding [5][6][7]. Other approaches propose growth of both the laser and transistor structures on a single chip.…”

Section: Introductionmentioning

confidence: 99%

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Direct and indirect band gaps in Ge under biaxial tensile strain investigated by photoluminescence and photoreflectance studies

et al. 2018

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Direct and indirect band gaps in Ge under biaxial tensile strain investigated by photoluminescence and photoreflectance studies

et al. 2018

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“…Optical interconnecting of IC elements is one of the advanced conceptual methods aimed at the solution of the problem being considered [7][8][9]. The majority of experts believe that this concept has a real chance to improve the performance of ICs.…”

Section: Introductionmentioning

confidence: 99%

Numerical Drift-Diffusion Simulation of GaAs p-i-n and Schottky-Barrier Photodiodes for High-Speed AIIIBV On-Chip Optical Interconnections

Pisarenko

Ryndin

2016

Electronics

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Abstract:In this paper, we consider the problem of the research and development of high-speed semiconductor photodetectors suitable for operation as parts of on-chip optical interconnections together with the high-speed laser modulators based on the A III B V nanoheterostructures. This research is aimed at the development of the models and modelling aids designed for the simulation of carrier transport and accumulation processes taking place in on-chip photosensitive devices during the detection of subpicosecond laser pulses. Another aim of the paper is to apply the aforementioned aids for the investigation of GaAs p-i-n and Schottky-barrier photodiodes. We propose the non-stationary drift-diffusion models, an original numerical simulation technique and the applied software allowing one to simulate the photosensitive devices with different electrophysical, constructive and technological parameters. We have taken into account different kinds of carrier generation and recombination processes, the effects of electron intervalley transition and carrier drift velocity saturation in order to improve the simulation results' adequacy. We have concluded that the influence of these effects on the performance of photodetectors for on-chip optical interconnections is significant. The response time of GaAs p-i-n and Schottky-barrier photodiodes calculated taking into account the drift velocity dependence on electric field intensity is insufficient for the adequate detection of subpicosecond laser pulses. According to the simulation results, it is reasonable to develop the methods aimed at the increase in the drift velocity of charge carriers in the photodetector active region by means of built-in electric field reduction.

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“…This has sparked interest among several research groups to propose architectures with photonic NoCs. [4][5][6] However, using optical links as mere drop-in replacements for the connections of electronic packet-switched networks is not the end. Conversion at each routing point from the optical to the electrical domain and back can be power inefficient and increase latency.…”

Section: Introductionmentioning

confidence: 99%

Cycle-accurate evaluation of reconfigurable photonic networks-on-chip

et al. 2010

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There is little doubt that the most important limiting factors of the performance of next-generation Chip Multiprocessors (CMPs) will be the power efficiency and the available communication speed between cores. Photonic Networks-on-Chip (NoCs) have been suggested as a viable route to relieve the off-and on-chip interconnection bottleneck. Low-loss integrated optical waveguides can transport very high-speed data signals over longer distances as compared to on-chip electrical signaling. In addition, with the development of silicon microrings, photonic switches can be integrated to route signals in a data-transparent way. Although several photonic NoC proposals exist, their use is often limited to the communication of large data messages due to a relatively long set-up time of the photonic channels. In this work, we evaluate a reconfigurable photonic NoC in which the topology is adapted automatically (on a microsecond scale) to the evolving traffic situation by use of silicon microrings. To evaluate this system's performance, the proposed architecture has been implemented in a detailed full-system cycle-accurate simulator which is capable of generating realistic workloads and traffic patterns. In addition, a model was developed to estimate the power consumption of the full interconnection network which was compared with other photonic and electrical NoC solutions. We find that our proposed network architecture significantly lowers the average memory access latency (35% reduction) while only generating a modest increase in power consumption (20%), compared to a conventional concentrated mesh electrical signaling approach. When comparing our solution to high-speed circuit-switched photonic NoCs, long photonic channel set-up times can be tolerated which makes our approach directly applicable to current shared-memory CMPs.

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On-Chip Optical Interconnect

Cited by 134 publications

References 36 publications

Direct and indirect band gaps in Ge under biaxial tensile strain investigated by photoluminescence and photoreflectance studies

Direct and indirect band gaps in Ge under biaxial tensile strain investigated by photoluminescence and photoreflectance studies

Numerical Drift-Diffusion Simulation of GaAs p-i-n and Schottky-Barrier Photodiodes for High-Speed AIIIBV On-Chip Optical Interconnections

Cycle-accurate evaluation of reconfigurable photonic networks-on-chip

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