Observing non-equilibrium state of transport through graphene channel at the nano-second time-scale

Abstract

Electrical performance of a graphene FET is drastically affected by electron-phonon inelastic scattering. At high electric fields, the out-of-equilibrium population of optical phonons equilibrates by emitting acoustic phonons, which dissipate the energy to heat sinks. The equilibration time of the process is governed by thermal diffusion time, which is few nano-seconds for a typical graphene FET. The nano-second time-scale of the process keeps it elusive to conventional steady-state or DC measurement systems. Here, we employ a time-domain reflectometry-based technique to electrically probe the device for few nano-seconds and investigate the non-equilibrium state. For the first time, the transient nature of electrical transport through graphene FET is revealed. A maximum change of 35% in current and 50% in contact resistance is recorded over a time span of 8 ns, while operating graphene FET at a current density of 1 mA/μm. The study highlights the role of intrinsic heating (scattering) in deciding metal-graphene contact resistance and transport through the graphene channel.

Experimental Observation and Modeling of the Impact of Traps on Static and Analog/HF Performance of Graphene Transistors

“…This is confirmed by the hysteresis observed in the experimental section. Self-heating effects are expected to be much faster [11], [12] than the trapping processes characterized with this pulse width. Notice that in contrast to other studies [3], [5], [8], [11], [12], the gate oxide traps are directly affected by transitions of the applied vertical fields here.…”

“…This standard characterization scheme usually acquires the current data at the end of the pulse where a steady-state current is expected. This steady-state in graphene devices however, depends on the technology and measurement history as elucidated by the wide span of trap-time constants reported in different studies (from ns to s) [2], [5], [8]- [12], [18]. The opposing sweep technique sketched in Fig.…”

“…Trap mechanisms within GFET architectures have been experimentally characterized by observing the electrical device characteristics obtained with time-dependent-voltage pulses [2]- [5], [8]- [12]. Different time constants related to trapping and detrapping processes have been identified for different graphene technologies ranging over a large span of time, depending on the location of the traps (bulk, oxide, channel, interfaces) [2], [8]- [11].…”

“…Different time constants related to trapping and detrapping processes have been identified for different graphene technologies ranging over a large span of time, depending on the location of the traps (bulk, oxide, channel, interfaces) [2], [8]- [11]. In most of the GFETs trap studies, the drain-to-source voltage V DS signal has been varied over time while keeping the gate-to-source V GS constant [3], [5], [8], [11], [12] i.e., V DSinduced hysteresis has been the main focus of such investigations rather than the trap impact on the device performance due to vertical fields applied to the channel. The latter effect has been studied for a global-back-gate device with SiO 2 dielectric [10] and for top-gate devices with high-κ gate oxides [2] in order to obtain the trapping time constants of such specific technologies.…”

A Roadmap for Disruptive Applications and Heterogeneous Integration Using Two-Dimensional Materials: State-of-the-Art and Technological Challenges

“…This is a value 20 times higher than typical contact resistance values in advance Si technologies. Only recently, by understanding the peculiar quantum chemistry of these contacts − does contact engineering in these materials became possible, which pushed the contact resistance values below the estimated fundamental limits derived from the Schottky–Mott formalism. The Schottky–Mott formalism defining the physics of charge injection across the metal–semiconductor interface becomes insufficient as the thickness of SC collapses to its 2D limit.…”