Novel selective poly - and epitaxial - Silicon growth (SPEG) technique for ULSI processing

Mieno, F.; Shimizu, Atsuo; Nakamura, S.; Deguchi, T.; Haga, Nobuhiko; Matsumoto, I.; Furumura, Y.; Yamauchi, Takahira; Inayoshi, K.; Maeda, Motoki; Yanagida, Kimio

doi:10.1109/iedm.1987.191336

Cited by 4 publications

(2 citation statements)

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“…PE-CVD SiN= has been used for the gate and passivation insulators in a-Si:H TFTs (2)(3)(4). In order to avoid surface bombardment of the a-Si:H layer by energetic plasma species, which include a high proportion of nitrogen-related impurities (5), the inverted-staggered structure has been employed for a-Si:H TFTs.…”

Section: Sumitomo Metal Industries Limited Advanced Technology Reseamentioning

confidence: 99%

“…Thus the active MOS transistor lies within the lowdefect portion of the recrystallized film. In previous studies (2,3), NMOS transistors were fabricated in seeded epitaxially grown areas in silicon films over oxide, although no attempt was made to recrystallize the polysilicon source/drain regions directly over the oxide. This can result in increased parasitic source/drain resistance and reduced device gain compared to SPIRRIT transistors.…”

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A Complementary Metal Oxide Semiconductor Process in Epitaxially Regrown Silicon over Oxide

Leung

Cole

Cobert

et al. 1991

J. Electrochem. Soc.

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A new solid-phase epitaxy technique, solid-phase isolated regrowth for radiation-immune technology (SPIRRIT), is described that has speed, density, and radiation-immunity advantages over bulk Si circuit technologies. Partial isolation between source and drain areas and substrate is achieved by incorporating a buried oxide layer into the metal oxide semiconductor (MOS) structures during complementary metal oxide semiconductor (CMOS) processing. Seeded epitaxial regrowth of an amorphized silicon film creates the active transistor channels. Rutherford backscattering and x-ray diffraction measurements indicate that the current amorphization and recrystallization process yields crystalline material to a depth of 0.2 vm, with some residual subsurface damage in the depth range from 0.2 to 0.5 ~m. PMOS SPIRRIT transistors have demonstrated near-bulk performance. NMOS SPIRRIT transistors displayed high transconductances, but also exhibited large leakage currents. The leakage is attributed to a spurious donor region in the recrystallized film.Silicon on insulator (SOD integrated circuit technologies have potential advantages in speed, packing density, and power dissipation compared to conventional bulk approaches, resulting from the reduced junction areas and the ideal isolation provided by the insulating substrate. In addition, SOI technologies are attractive for space applications, due primarily to their inherent radiation immunity. However, the complexities of material preparation for many SOI technologies can add considerably to chip costs and may introduce additional device failure modes, thereby reducing circuit reliability. The solid phase isolated regrowth for radiation immune technology (SPIR-RIT) technique, currently under study at The Aerospace Corporation, is an alternative to SOI technologies. It addresses these issues by incorporating a buried oxide into the MOS transistor structure during CMOS processing. The SPIRRIT fabrication sequence employs CMOS-c0m-patible process steps such as localized oxidation of silicon (LOCOS), polysilicon deposition, silicon ion implantation, and thermal annealing to form transistors with source and drain areas that are isolated from the bulk silicon substrate by a buried oxide. The SPIRRIT technique is compatible with standard production equipment and procedures. It requires a low-pressure chemical vapor deposition (LPCVD) reactor for film deposition, an ion implanter for amorphization, and a furnace for annealing the film. In other respects, it utilizes conventional CMOS processing procedures. In this way, the speed, density, and radiation immunity improvements over bulk CMOS technologies can be realized without substantial cost or complexity penalties. This method therefore appears to be a promising approach for production.Cross-sectional and plan views of the SPIRRIT structure are shown in Fig. 1. The channel of the MOS device is fabricated over the seed window and electrically connected to the buried shield through the seed. The source and drain regions are formed in the th...

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Section: Sumitomo Metal Industries Limited Advanced Technology Reseamentioning

confidence: 99%

mentioning

confidence: 99%

A Complementary Metal Oxide Semiconductor Process in Epitaxially Regrown Silicon over Oxide

Leung

Cole

Cobert

et al. 1991

J. Electrochem. Soc.

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A new DRAM cell with a transistor on a lateral epitaxial silicon layer (TOLE cell)

Terada

Ishijima

Kubota

et al. 1990

IEEE Trans. Electron Devices

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The design and characterization of nonoverlapping super self-aligned BiCMOS technology

Chiu

Chin

Lau

et al. 1991

IEEE Trans. Electron Devices

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Novel selective poly - and epitaxial - Silicon growth (SPEG) technique for ULSI processing

Cited by 4 publications

References 0 publications

A Complementary Metal Oxide Semiconductor Process in Epitaxially Regrown Silicon over Oxide

A Complementary Metal Oxide Semiconductor Process in Epitaxially Regrown Silicon over Oxide

A new DRAM cell with a transistor on a lateral epitaxial silicon layer (TOLE cell)

The design and characterization of nonoverlapping super self-aligned BiCMOS technology

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