Novel Low Turn-Off Loss Trench-Gate FS-IGBT With a Hybrid $p^{{+}}/{n}$ Collector Structure

Abstract

A trench-gate field stop insulated gate bipolar transistor (TFS-IGBT) with a novel hybrid p + /n collector structure is proposed to enhance the trade-off relationship between the on-state voltage drop (V on ) and the turn-off energy loss (E off ). The proposed hybrid collector structure consists of a p + /n layer between the p + collector and the field stop layer. During turn-on, the p + regions in the hybrid p + /n layer provide high carrier injection efficiency. During turn-off transient, the n-regions in the hybrid p + /n collector provide fast carrier extraction paths for holes. 2-D numerical simulations comparing a conventional TFS-IGBT, an injection efficiency controlled IGBT with the proposed hybrid p + /n collector TFS-IGBT (HC-IGBT) having similar device structures show that for a 1.2 kV rating and with V on at 1.5 V, the HC-IGBT has an advantage in E off reduction by 69% and 22%, respectively. Finally, backside mask alignment is not needed for fabricating the proposed hybrid p + /n collector structure. INDEX TERMS Hybrid p + /n collector, insulated gate bipolar transistor, on-state voltage drop, turn-off energy loss. KUI MA (M'17) received the B.S. and Ph.D. degrees in microelectronics and solid-state electronics from the

Termination area design for reduced leakage current and improved ruggedness of HV IGBTs

“…Ideas presented in papers [28][29][30] are aimed at improving V on versus E off trade-off and target optimization of the active area. Patents 28,29) disclose an IGBT with floating N+ islands inside the N-buffer of the active area while use of alternating P+/N regions between the N-buffer and transparent P+ Collector of the active region is described in paper.…”

“…Patents 28,29) disclose an IGBT with floating N+ islands inside the N-buffer of the active area while use of alternating P+/N regions between the N-buffer and transparent P+ Collector of the active region is described in paper. 30) We report here a termination design based on using selective Buried N+ regions inside the N-buffer layer of the termination area which can notably improve robustness of high voltage IGBTs. Optimum placement of Buried N+ regions in the N-buffer can significantly reduce carrier injection in the termination region without affecting other important device characteristics such as V on .…”