Novel integration technologies for highly manufacturable 32 Mb FRAM

Kim, H.H.; Song, Young Joo; Lee, S.Y.; Joo, Hyonam; Jang, Nakwon; Jung, Dong-Hoon; Park, Y.S.; Park, S.O.; Lee, K.M.; Joo, Sang Hyun; Nam, Sang-Wan; Kim, K.

doi:10.1109/vlsit.2002.1015456

Cited by 7 publications

(4 citation statements)

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“…F erroelectric random access memories (FRAMs) are now important commercial products, with a Fujitsu 8‐kbit FRAM made of lead zirconate titanate (PZT) in every SONY Playstation 2, a state‐of‐the‐art 32‐Mbit PZT FRAM fabricated for internal use at Samsung (illustrated in Fig. 1), 1 and 4‐Mbit strontium bismuth tantalate (SBT) FRAMs at Matsushita. The present driving force is a competition with magnetic RAMs, outlined in Table I.…”

Section: Introductionmentioning

confidence: 99%

Recent Materials Characterizations of [2D] and [3D] Thin Film Ferroelectric Structures

Scott

Morrison

Miyake

et al. 2005

Journal of the American Ceramic Society

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A review is given of ceramic and single-crystal thin film ferroelectric oxides, emphasizing perovskite phases, together with some new developments on hafnia films. It is shown that singlecrystal barium titanate films behave as bulk down to at least 77 nm, with no finite size effects, no phase transition temperature shifts, and no dielectric peak broadening or change from first-to second-order transitions, suggesting that the gradient defect model of Bratkovsky and Levanyuk correctly describes such effects as extrinsic in experimental studies of equally thin ceramic thin films. In ceramic barium-strontium titanate (BST) thin films, it is shown that there is also no intrinsic broadening or shifts in phase transitions, with sharp, unshifted, bulk-like transitions observed only as re-entrant upon warming from cryogenic temperatures; this shows that phase transitions in ceramic thin films are dominated by kinetics and not thermodynamics and are definitely not equilibrium measurements. At high fields (41 GV/m), the films exhibit space charge-limited conduction; no variable-range hopping is observed, contrary to recent studies on SrTiO 3 . Some novel, unconventional switching processes are discussed, comparing the ''perimeter effect'' (non-equilibrium, ballistic) with Molotskii's equilibrium model. Theory and experiment are described for [3D] nanotubes, nanorods, and nanoribbons (or micro-ribbons). The layered-structure-perovskitepyrochlore conversion in bismuth titanate is described together with the PbO1TiO 2 phase separation in lead zirconate titanate during electrical breakdown, as are novel HfO 2 precursors that demonstrate enhanced temperature crystallization from the amorphous state and hence commercial advantages for frontend processing. II. [2D] SystemsIn planar structures, both fine-grained ceramics and single crystals offer intriguing materials science in the 4-100 nm thickness regime. Several authors 2-4 have indicated that thin films might exhibit second-order phase transitions that, in bulk form, are first order; then, the question is exactly what thicknesses constitute ''thin''? Although the International FRAM ''Roadmap'' suggests 5 that FRAM structures must become [3D] by 2007 to accommodate requisite capacitance, at present, all FRAMs are planar-stacked devices. Therefore, we begin with the [2D] systems' materials science. J ournal

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Section: Introductionmentioning

confidence: 99%

Recent Materials Characterizations of [2D] and [3D] Thin Film Ferroelectric Structures

Scott

Morrison

Miyake

et al. 2005

Journal of the American Ceramic Society

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“…This is because contact forming onto the top electrode of a cell capacitor may provoke another root-cause of capacitor degradation during the process integration. Since it is suitable for protecting ferroelectric capacitors from any involvement of aluminum when forming the plate line and strapping line, an addition-top-electrode (ATE) scheme has been adopted for this contact formation (Kim et al, 2002). The ATE landing pad consists of iridium oxide and iridium.…”

Section: Integration Technologiesmentioning

confidence: 99%

“…In similar to DRAM, an attempt to build smaller unit cell in size was in the late 1990's that one transistor and one capacitor (1T1C) per unit memory was developed (Jung et al, 1998). Since then, many efforts to build high density FRAM have been pursued, leading to several ten mega bits in density during the 2000s Kim et al, 2002;Kang et al, 2006;Hong et al, 2007;Jung et. al, 2008).…”

Section: Introductionmentioning

confidence: 99%

Future Memory Technology and Ferroelectric Memory as an Ultimate Memory Solution

Kim¹,

Jung²

2011

Ferroelectrics - Applications

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“…Already developed stacked cells [6][7][8] have limited compatibility with 3D FeCap integration, and cannot be of help when it would be desirable to use evolutionary approaches.…”

Section: Planar Fecapsmentioning

confidence: 99%

Challenges for Integration of Embedded FeRAMs in the sub-180 nm Regime

Zambrano

2003

Integrated Ferroelectrics

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Ferroelectric memories (FeRAMs) are more and more using stack cells in 1T1C configuration. While none of these are already in real production, a great progress has been made when comparing these with strapped cells in 2T2C configuration. However the FeRAM community must be ready to face another challenging step in the evolution, i.e. the transition from planar to 3D capacitors. There's no consensus on the best approach to address this issue, which is probably a must at the 130 nm node. This paper reviews the limitations of the most popular approaches, then starts comparing two possible 3D FeCap structures (pin and cup-shaped). The final sections are dedicated to the introduction of a different strategy, trying to use a evolutionary approach. This is pursued starting with the development of a "quasi planar" FeCap in 0.35 µm technology that can evolve into a "quasi 3D" one at 0.18 µm node, and in a true one for 0.13 µm (or finer) rules.

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Novel integration technologies for highly manufacturable 32 Mb FRAM

Cited by 7 publications

References 1 publication

Recent Materials Characterizations of [2D] and [3D] Thin Film Ferroelectric Structures

Recent Materials Characterizations of [2D] and [3D] Thin Film Ferroelectric Structures

Future Memory Technology and Ferroelectric Memory as an Ultimate Memory Solution

Challenges for Integration of Embedded FeRAMs in the sub-180 nm Regime

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