Novel clamp circuits for IC power supply protection

Concurrent Detection of Faults Affecting Energy Harvesting Circuits of Self-Powered Wearable Sensors

“…2(d), we can observe that the voltage on V out can exceed the maximum voltage value allowed for the correct operation of the sensor (3.6V). In order to limit the maximum voltage value on V out to 3.6V, we can employ low cost protection circuits, as those based on clamping circuits presented in [12].…”

Electrostatic discharge protection design for mixed-voltage CMOS I/O buffers

“…Without the -to-ESD clamp circuit in this test chip, the original ESD levels of the mixed-voltage I/O buffer (without SNTSCR device) in the PD-and ND-mode ESD stresses are almost the same of 2.8 kV 2.9 kV. In the whole-chip layout of a CMOS IC, the turn-on efficient -to-ESD clamp circuit [16]- [18], [21], [24] should be added into the chip layout to improve the ND-mode ESD level of the mixed-voltage I/O buffers and also to avoid unexpected internal ESD damages.…”

“…However, while mixed-voltage I/O circuits operate in a high-temperature environment with a high-voltage input, the forward-biased leakage current from the pad to through the stacked diodes with their parasitic vertical p-n-p bipolar junction transistors (BJT) devices must be reduced by some extra circuit designs [21]- [24]. To sustain a high ESD level within a smaller silicon area, the low-voltage-triggering SCR (LVTSCR) device [25]- [27] has been reported as one of the most effective ESD clamp devices in CMOS ICs.…”

Faults Affecting Energy-Harvesting Circuits of Self-Powered Wireless Sensors and Their Possible Concurrent Detection

“…2(b), we can also observe that Vout can exceed the maximum value (2.1V) allowed for the sensor correct operation. As previously clarified, in order to set such a maximum voltage to 2.1V, we included in the EHC a low cost clamping circuit [16]. Such a circuit also avoids that possible sudden voltage bursts on Vout, induced by capacitive or inductive coupling can exceed 2.1V.…”

“…This way, we can guarantee that Vref will never fall below 1.5V. Moreover, we included a clamping circuit of the kind in [16] in the EHC to prevent Vout from rising above the maximal allowed value (2.1V). Therefore, an increase in the breakdown voltage of the Zener diode will not affect the EHC correct operation.…”