Novel 1T2R1T RRAM-based Ternary Content Addressable Memory for Large Scale Pattern Recognition

Abstract

Resistive Random Access Memories (RRAMs) are a promising solution to implement Ternary Content Addressable Memories (TCAMs) that are more area-and energy-efficient with respect to Static Random Access Memory (SRAM)-based TCAMs. However, RRAM-based TCAMs are limited in the number of bits per word due to the low ratio between the resistances of the high and low resistance states (HRS/LRS) and resistance variability of RRAM. Such a limitation on the word length hinders the parallel search of a very large number of data bits for data-intensive applications. To overcome this issue, for the first time, we propose a new TCAM cell composed of two transistors and two RRAMs in a 1T2R1T configuration, where a RRAM voltage divider (2R) biases a transistor gate (1T) and an additional transistor is used to program the RRAMs (1T). A 3x128bits 1T2R1T TCAM macro were designed, integrated and extensively characterized. We experimentally demonstrate that the sensing margin of the proposed structure is insensitive to HRS/LRS RRAM resistance ratio and variability. With respect to the most common type of 2T2R RRAM-based TCAM [1-3], the proposed circuit improves the sensing margin by >5000x while reaching search times of 0.93ns. This allows the search of large volumes of data in parallel. In addition, the proposed structure improves programming and search endurance by 100x and >10x, respectively.

Self‐selective memristor‐enabled in‐memory search for highly efficient data mining

“…Figure 4H illustrates the comparison of different typical TCAMs 23–28 . Our 2SSM TCAM shows significant improvement in terms of cell area, and search energy.…”

“…Figure 4H illustrates the comparison of different typical TCAMs. [23][24][25][26][27][28] Our 2SSM TCAM shows significant improvement in terms of cell area, and search energy. First, the cell area of our TCAM is 8F 2 (4F 2 Â 2) in the ideal case.…”

Referencing-in-Array Scheme for RRAM-based CIM Architecture

“…On top of that, an RRAM device also suffers from the accumulated effect of large number of read operations that can lead to significant conductance change (conductance drift) or unwanted bit-flip (read disturb) [3,20]. Existing solutions to deal with all these challenges are mainly based on large and complex SAs and reference generators; however they degrade the overall efficiency of the computing [4][5][6][7][8][9][21][22][23][24]. Supporting multi-operand operations further aggravates the above aforementioned challenges [8,21].…”

Advances in Emerging Memory Technologies: From Data Storage to Artificial Intelligence

“…TCAMs provide a lookup response in a single clock cycle making them faster and more energyefficient than random access memory-based search systems. Emerging memories and in particular RRAMs are a promising solution to implement TCAMs and can offer more area-and energy-efficiency with respect to static random access memory (SRAM)-based TCAMs [104].…”