Proceedings of the 2016 International Symposium on Low Power Electronics and Design 2016
DOI: 10.1145/2934583.2934629
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Normally-OFF STT-MRAM Cache with Zero-Byte Compression for Energy Efficient Last-Level Caches

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Cited by 3 publications
(1 citation statement)
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“…In particular, standby power of the constituent caches account for much proportion in that of logic systems, and thus its reduction is considerably indispensable. Application of emerging nonvolatile memory such as spin-transfer torque magnetoresistive RAM (STT-MRAM) to caches can achieve extremely low standby power owing to its nonvolatile retention ability [2,3,4,5,6,7,8,9,10,11,12,13,14,15]. However, its high store energy and long store latency restrict the application to the last-level cache or main memory.…”
Section: Introductionmentioning
confidence: 99%
“…In particular, standby power of the constituent caches account for much proportion in that of logic systems, and thus its reduction is considerably indispensable. Application of emerging nonvolatile memory such as spin-transfer torque magnetoresistive RAM (STT-MRAM) to caches can achieve extremely low standby power owing to its nonvolatile retention ability [2,3,4,5,6,7,8,9,10,11,12,13,14,15]. However, its high store energy and long store latency restrict the application to the last-level cache or main memory.…”
Section: Introductionmentioning
confidence: 99%