Investigating Frequency Scaling, Nonvolatile, and Hybrid Memory Technologies for On-Chip Routers to Support the Era of Dark Silicon

Rani, Khushboo; Kapoor, Hemangee K.

doi:10.1109/tcad.2020.3007555

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Investigating Frequency Scaling, Nonvolatile, and Hybrid Memory Technologies for On-Chip Routers to Support the Era of Dark Silicon

Cited by 3 publications

References 38 publications

A Hop-Parity-Involved Task Schedule for Lightweight Racetrack-Buffer in Energy-Efficient NoCs

A Hop-Parity-Involved Task Schedule for Lightweight Racetrack-Buffer in Energy-Efficient NoCs

Exploring Security Threats by Hardware-Faults in Approximate Arithmetic Computing

Parasitic Effects Analysis and Equivalent Circuit Modeling of Tapered Serpentine Interconnects of On-chip FBAR up to 67GHz

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