Nonvolatile memory based on sol-gel ZnO thin-film transistors with Ag nanoparticles embedded in the ZnO/gate insulator interface

Abstract

A nonvolatile memory is demonstrated using a solution-processed sol-gel ZnO thin-film transistor ͑TFT͒ in which Ag nanoparticles are embedded as charge storage nodes at the insulator-ZnO interface. Its TFT transfer characteristics exhibit a large clockwise hysteresis that is proportional to the gate bias sweep range. Measurement of the threshold voltage shift versus the pulse width of gate bias reveals that the device can be programed or erased at a time scale of as short as 10 −4 s. Retention of the initial memory window is measured to be 27% after 10 5 s and projected to last until 10 7 s.

Low‐Temperature Solution‐Processed Memory Transistors Based on Zinc Oxide Nanoparticles

“…Precursor solutions of the desired inorganic material can sometimes be processed with solution techniques and then converted through thermal treatment. [2,[14][15][16] However, the required temperatures are often too high to be compatible with plastic substrates. [16] Another approach utilizes nano-sized inorganic components, such as nanoparticles, nanorods or nanowires.…”

“…[2,[14][15][16] However, the required temperatures are often too high to be compatible with plastic substrates. [16] Another approach utilizes nano-sized inorganic components, such as nanoparticles, nanorods or nanowires. [17][18][19][20][21] These can be dispersed in suitable solvents and thereby processed with solution-based methods.…”

Nonvolatile organic transistor-memory devices using various thicknesses of silver nanoparticle layers

“…7 Usually, the charge-trapping elements in the chargeable gate dielectric are nanoparticles ͑NPs͒ of metals such as Cr, 8 Au, 6 and Ag. 9 Compared with ferroelectric polymer-based memory, devices using metal NPs as charge traps have an advantage that the trap density and distribution can be controlled by adjusting the density and location of the NPs during the NP formation process, by using ultrathin metallic films deposition or ion implantation techniques. 10,11 Recently, we reported a different structure of transistor memory device with remarkable memory window performance by placing silver NPs in between two pentacene layers.…”

Sub-100 nm Ferroelectric-Gate Thin-Film Transistor with Low-Temperature PZT Fabricated on SiO2/Si Substrate

“…It is well-known that oxide-semiconductor channel-based TFTs with a channel layer such as (ZnO) [5], indium gallium zinc oxide (IGZO) [6], indium zinc oxide (IZO) [7], or indium tin oxide (ITO) [8], has been successfully demonstrated using solution-processed and low-temperature deposition methods. When the gate insulator is paraelectric, TFTs require a high-operation voltage due to a small induced charge density coming from the paraelectric materials.…”