2014 9th International Design and Test Symposium (IDT) 2014
DOI: 10.1109/idt.2014.7038588
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Nonvolatile memories: Present and future challenges

Abstract: Due to the rapid development of hand-held electronic devices, the need for high density, low power, high performance SoCs has pushed the well-established embedded memory technologies to their limits. To overcome the existing memory issues, emerging memory technologies are being developed and implemented. The focus is placed on non-volatile technologies, which should meet the high demands of tomorrow applications. The nonvolatile memory technologies being intensively researched today are the Flash memories and … Show more

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Cited by 34 publications
(20 citation statements)
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“…On crossbar-based arrays, which is one of the potential array integration topologies offered by RRAM technology [3], [4], unselected WLs and BLs can be grounded or biased with a V dd /3 or V dd /2 scheme. In order to evaluate the impact on unselected WLs and BLs during set/reset opearation in the worst-case condition, the V dd /2 biasing effect on reset and set wordlines has been evaluated on 0.6 µm 2 and 1 µm 2 RRAM arrays.…”
Section: Read Disturbs and Instabilitiesmentioning
confidence: 99%
See 1 more Smart Citation
“…On crossbar-based arrays, which is one of the potential array integration topologies offered by RRAM technology [3], [4], unselected WLs and BLs can be grounded or biased with a V dd /3 or V dd /2 scheme. In order to evaluate the impact on unselected WLs and BLs during set/reset opearation in the worst-case condition, the V dd /2 biasing effect on reset and set wordlines has been evaluated on 0.6 µm 2 and 1 µm 2 RRAM arrays.…”
Section: Read Disturbs and Instabilitiesmentioning
confidence: 99%
“…From a technological standpoint, embedded HfO 2 -based RRAM devices are interesting because they offer compatibility with the standard CMOS backend-ofline (BEOL) process scheme and very fast operation times, mostly below the 100 ns limit. Extensive characterizations have been performed in the framework of a concept-validation for possible replacement of existing non-volatile memory technologies, trying to ease the evolution from single cell test structures to fully functional integrated array products [1]- [4].…”
Section: Introductionmentioning
confidence: 99%
“…The process of sending spikes to presynaptic neurons is known as back propagation. Emerging Back-End Of Line (BEOL) resistive memory devices are considered as the optimum candidates to emulate biological synaptic behavior at nanometer scale as they offer the possibility to modulate their conductance in addition to being easily integrated with CMOS-based neuron circuits [6] [7]. Among these emerging technologies, Oxide-based RAM (so called OxRAM) have proven to be very effective in implementing some aspects of synaptic plasticity [8].…”
Section: Introductionmentioning
confidence: 99%
“…Data [9] Due to the stochastic nature of the switching process in OxRAMs, leading to large variability, the OxRAM model features a variability dependency. The variation is chosen to fit experimental data as presented in Figure 3.…”
Section: Tset Vappmentioning
confidence: 99%
“…Indeed, as ReRAM data is stored as two resistance states of the resistive switching device, these memories are sensitive to resistive paths [8]. On top of that, common problems with ReRAMs are related to high variability in operating conditions [9].…”
Section: Introductionmentioning
confidence: 99%