Non-homogeneous electrical transport through silicon-on-sapphire thin films: Evidence of the internal stress influence

Quantum inversion layer mobility: numerical results

“…The result of this effect is that, while for unstressed materials the E levels fall below the E' ones (due to the higher m, value occuring in (l)), with compressive stress Eh < Eo can occur. The shift in carriers to the x-y ellipsoids results in lower mobility in bulk material [7], [8] due to higher mxy values in (2). The result in a MOSFET can be more complicated due to the movement of E, E', and EF levels with field [l].…”

“…8) In the packaging of chips by various means, thermal stress can be generated due to the thermal expansion mismatch sufficient to crack the die if care is not taken. Residual stress transmitted to the silicon in any given process may be quite variable.…”

“…For SOS, the stress present has been measured by a number of workers [7], [8] by use of direct means [9] as well as Raman scattering [lo]. A value of stress can also be calculated using the difference in expansion coefficients between silicon and sapphire and the temperature difference between the growth temperature of -950°C and room temperature.…”

Doping profile extraction in thin SOI films: Application to A2RAM

“…WITH TCAD To extract the bridge doping profile, we revisit the method described in [6][7][8][9][10][11]. The depletion depth depends on the gate voltage: a small signal variation on the metal modifies the depletion depth and the charge density at bottom of the film.…”

Process-Dependent Circuit Modeling and Simulation of SOI JFETs: Digital VLSI Applications

“…This mismatch causes strain-induced charge in the band structure upon cooling which limits the carrier mobility as compared to that of bulk Si values. These defects can be reduced by molecular beam epitaxy, laser annealing, and better cleaning of the substrate, as discussed in [6]. Using SOI structures reduces the interface states effects, although it does not eliminate them completely.…”