2014
DOI: 10.1007/978-3-319-03659-5
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Noise-Shaping All-Digital Phase-Locked Loops

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Cited by 10 publications
(3 citation statements)
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References 9 publications
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“…The coherence of circuits is provided by delay link (1 − 0 2 ⁄ ) ⋅ so that these signals coincide. Synchronization system accuracy is assessed by dispersion of GMSK, as in Figure 4, bit sequence reflecting the synchronization in the circuit [5][6][7][8][9][10][11][12][13].  should be filtered and furthermore is used for frequency control in pulse generator and integrators in order to remove a synchronization error.…”
Section: Methodsmentioning
confidence: 99%
See 1 more Smart Citation
“…The coherence of circuits is provided by delay link (1 − 0 2 ⁄ ) ⋅ so that these signals coincide. Synchronization system accuracy is assessed by dispersion of GMSK, as in Figure 4, bit sequence reflecting the synchronization in the circuit [5][6][7][8][9][10][11][12][13].  should be filtered and furthermore is used for frequency control in pulse generator and integrators in order to remove a synchronization error.…”
Section: Methodsmentioning
confidence: 99%
“…Thus both phase locked loop (PLL), which recovers signal carrier frequency and clock synchronization devices (CSD) are needed to be included to the receiving part. Analysis of works [6][7][8] showed that the basic accent at the decision the task of synchronization charts construction is put on the usage of synchronization devices which are built on the PLL systems. This paper presents the recent problems of the analytical description of synchronization systems that form on the receiving side of radio-frequency line supporting jitter when included some noise that impairs the accepted signal, and also the description of the accident state of a signal.…”
Section: Introductionmentioning
confidence: 99%
“…This raises the question of improving synchronization system especially in ASTESJ ISSN: 2415-6698 case of using in communication systems frequency, phase and quadrature methods of digital modulation [7]- [9]. Papers [4,5] represent linear and nonlinear analysis of clock synchronization devices. Probability of acquisition and probability of cycle slip are estimated.…”
Section: Introductionmentioning
confidence: 99%