2014
DOI: 10.1088/1748-0221/9/05/c05051
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Noise performance and ionizing radiation tolerance of CMOS Monolithic Active Pixel Sensors using the 0.18μm CMOS process

Abstract: CMOS Monolithic Active Pixel Sensors (MAPS) have demonstrated excellent performance as tracking detectors for charged particles. They provide an outstanding spatial resolution (a few μm), a detection efficiency of ≳99.9%, very low material budget (0.05% X0) and good radiation tolerance (≳ 1 Mrad, ≳ 1014 neq/cm2) [1]. This recommends them as an interesting technology for various applications in heavy ion and particle physics.For the vertex detectors of CBM and ALICE, we are aiming at developing large scale sens… Show more

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Cited by 7 publications
(10 citation statements)
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“…Therefore, the architecture is being migrated from the previously used 0.35 µm CMOS process to an intrinsically more radiation tolerant 0.18 µm process. First prototypes manufactured in this process tolerated up to ∼ 10 Mrad [8]. This fits our needs but remains to be reproduced with sensors hosting the full analog and digital read-out chain.…”
Section: Status Of the Sensor Randdmentioning
confidence: 85%
“…Therefore, the architecture is being migrated from the previously used 0.35 µm CMOS process to an intrinsically more radiation tolerant 0.18 µm process. First prototypes manufactured in this process tolerated up to ∼ 10 Mrad [8]. This fits our needs but remains to be reproduced with sensors hosting the full analog and digital read-out chain.…”
Section: Status Of the Sensor Randdmentioning
confidence: 85%
“…The tolerance of CPS to ionizing radiation depends signicantly on the specic design of the device. For imagers relying on simple pre-ampliers, a tolerance to ≳ 10 Mrad was observed [94]. Highly integrated sensors relying on clamping pixels were found to withstand 1.6 Mrad.…”
Section: Integrated Displacement Damage Caused By Heavy Ionsmentioning
confidence: 94%
“…Tab. 2 lists the results of a study on the impact of a modication of the width of the transistor gate of the SF-transistor in SB-pixels [94]. One observes that the average noise of the pixels increases slightly once the width of the transistor gate is reduced.…”
Section: Thermal Annealingmentioning
confidence: 99%
“…This reduces the overall performance of the device as CPS use typically a common threshold, which has to be set according to the noise of the most noisy pixels. It was shown, that increasing the surface of the transistor gate of the SF-transistor in SB-pixels alleviates the issue [91]. Increasing the gate surface of CPS manufactured in 0.18 µm technology was found to reduce the pixel noise decisively [16].…”
Section: Rts In Mosfet-transistorsmentioning
confidence: 99%