Nickel nanocrystals with HfO2 blocking oxide for nonvolatile memory application

Yang, Fu-Liang; Chang, T. C.; Liu, Po–Tsun; Chen, U. S.; Yeh, Ping Hung; Yu, Yixuan; Lin, Jian-Yang; Sze, Simon M.; Lou, Jen‐Chung

doi:10.1063/1.2743926

Cited by 61 publications

(25 citation statements)

References 11 publications

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“…The resulting nanocrystals are estimated to be 4-5 nm, separated with the intervals of approximately 15 nm. Unlike previous works on the formation of Ni-nanocrystals, [18][19][20]24 the uniform distribution eliminates the difficulty in depositing ferromagnetic Ni thin layers and subsequently forming size-controlled Ni crystals. Assuming that the square-like distribution is fabricated through the reduction step, the density is calculated to be 4.4 Â 10 11 dots/cm 2 .…”

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confidence: 83%

“…In particular, Ni-based nanocrystals were attempted in the combined form of physical deposition and post thermal treatments. [18][19][20][21][22][23] The formation of charge-trapping nanocrystals has been shown through physical and chemical deposition of metallic or semiconducting layers followed by thermal or optical annealing or chemical dispersion of nanocrystals onto the dielectric thin films. Those approaches suffer from the disadvantage that processing is discontinuous, while facile continuous processing would be preferred.…”

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confidence: 99%

“…Unlike previous approaches, [8][9][10][11][12][13][14][15][16][17][18][19][20][21][22][23] the current layered nanolaminate was fabricated using ALD according to the schematic diagram shown in Fig. 1a and the corresponding energy band diagram of Fig.…”

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confidence: 99%

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Comparison of Nonvolatile Memory Effects in Ni-Based Layered and Dotted Nanostructures Prepared through Atomic Layer Deposition

Lee

Kim

Hwang

et al. 2011

Electrochem. Solid-State Lett.

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Nano-floating gate memory devices were fabricated by using nickel nanocrystals as a charge-trapping portion embedded into Al 2 O 3 thin films. Ni nanocrystals were prepared via a thermal reduction of nanoscale NiO layers deposited by atomic layer deposition. Although the continuous deposition of insulating Al 2 O 3 and semiconducting NiO thin films allowed the facile fabrication of charge-trap, the corresponding retention feature suffers from inferior charge trapping/detrapping. On the other hand, the Ni nanocrystals enhanced the retention behavior and exhibited the largest memory window of 13.8 V with the stored charge density of 2.5 Â 10 13 traps/cm 2 , probably due to the isolated formation of charge-trapping centers.Next-generation non-volatile memories will have to meet stringent device performance requirements, such as higher speed, enhanced data storage density, limited device space, and lower power consumption, in addition to possessing nonvolatile features in data storage mode. In particular, nano-floating gate memories (NFGMs) are the dominant type of memory compared to their current competitors, such as phase-change random access memories (RAMs), resistive RAMs, polymer RAMs, magnetic RAMs etc. 1-7 NFGM performance far exceeds the currently-evolved flash memories and dynamic random access memories in terms of operation voltage, consumption power, and data volatility. Further, NFGMs can be effectively adapted to the pre-existing Si processing/technology through the incorporation of sophisticated thin dielectric layers. The performance of NFGMs depends largely upon the delicate function of the charge-trapping materials embedded into the high-k thin films. Furthermore, NFGMs should meet stringent requirements of nonvolatile memories: fast programming/erasing speed, high-number programming/easing cycles, and long-period charge retention.A typical strategy is to combine high-k dielectric materials (Al 2 O 3 , ZrO 2 , HfO 2 , etc. 8-22 ) with metallic and semiconducting nanocrystals such as Pt, Au, Co, Ge, Ni, and silicides. In particular, Ni-based nanocrystals were attempted in the combined form of physical deposition and post thermal treatments. 18-23 The formation of charge-trapping nanocrystals has been shown through physical and chemical deposition of metallic or semiconducting layers followed by thermal or optical annealing or chemical dispersion of nanocrystals onto the dielectric thin films. Those approaches suffer from the disadvantage that processing is discontinuous, while facile continuous processing would be preferred.Since the introduction of atomic layer deposition (ALD) by Suntola, 24 ALD has been gaining widespread attention in semiconductors and flat-panel displays, owing to conformal coverage in lowdimensional structures, superior control in film thickness and robust dielectrics. ALD was employed to continuously deposit insulating and charge-trapping layers without any process interruptions. 25 A semiconducting oxide, such as nickel oxide (NiO), has been proposed as a candidate for charge-...

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Comparison of Nonvolatile Memory Effects in Ni-Based Layered and Dotted Nanostructures Prepared through Atomic Layer Deposition

Lee

Kim

Hwang

et al. 2011

Electrochem. Solid-State Lett.

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“…[8][9][10][11][12][13][14][15][16][17][18][19][20] To achieve good memory characteristics, some highk oxide dielectrics have been proposed and studied as the tunneling layer, chargetrapping layer and blocking layer, respectively. For example, HfO 2 , ZrO 2 , Y 2 O 3 and La 2 O 3 have been employed to replace Si 3 N 4 in SONOS memory devices to acquire better trapping characteristics, [21][22][23] and Al 2 O 3 has been employed as the tunneling layer and the blocking layer to reduce the working voltage.…”

Section: Introductionmentioning

confidence: 99%

The effect of the thickness of tunneling layer on the memory properties of (Cu2O)0.5(Al2O3)0.5 high-k composite charge-trapping memory devices

et al. 2016

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The charge-trapping memory devices namely Pt/Al 2 O 3 /(Al 2 O 3 ) 0.5 (Cu 2 O) 0.5 /SiO 2 /pSi with 2, 3 and 4 nm SiO 2 tunneling layers were fabricated by using RF magnetron sputtering and atomic layer deposition techniques. At an applied voltage of ±11 V, the memory windows in the C-V curves of the memory devices with 2, 3 and 4 nm SiO 2 tunneling layers were about 4.18, 9.91 and 11.33 V, respectively. The anomaly in memory properties among the three memory devices was ascribed to the different back tunneling probabilities of trapped electrons in the charge-trapping dielectric (Al 2 O 3 ) 0.5 (Cu 2 O) 0.5 due to the different thicknesses of SiO 2 tunneling layer.

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“…1 Compared to semi-conductive (Si,Ge) 2,3 and organic (C, graphene) 4,5 charge storage candidates, noble metal nanoparticles (Pt, 6 Au 7 and Ag 8 ) embedded in oxide dielectric films (Al 2 O 3 , HfO x , ZrO 2 , TiO 2 , HfAlO x ) have been highlighted due to their high work function and excellent charge properties, but they are not suitable for large-scale industrial applications due to their high cost. Ni nanocrystals (Ni-NCs) has a high work function of 5.35 eV, 9 stable chemical properties, and have been reported to exhibit a memory window width (flat-band voltage shift |∆ V FB |) ranging from 1 to 20 V, [10][11][12][13][14][15][16] showing excellent charge storage capacity. However, due to the oxidization of Ni-NCs in oxide matrix and diversify of nickel oxides, the endurance and retention properties for Ni-NCs-based memory cell need to be further improved.…”

Section: Introductionmentioning

confidence: 99%

Charge storage and tunneling mechanism of Ni nanocrystals embedded HfOx film

et al. 2016

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A nano-floating gate memory structure based on Ni nanocrystals (NCs) embedded HfOx film is deposited by means of radio-frequency magnetron sputtering. Microstructure investigations reveal that self-organized Ni-NCs with diameters of 4-8 nm are well dispersed in amorphous HfOx matrix. Pt/Ni-NCs embedded HfOx/Si/Ag capacitor structures exhibit voltage-dependent capacitance-voltage hysteresis, and a maximum flat-band voltage shift of 1.5 V, corresponding to a charge storage density of 6.0 × 1012 electrons/cm2, is achieved. These capacitor memory cells exhibit good endurance characteristic up to 4 × 104 cycles and excellent retention performance of 105 s, fulfilling the requirements of next generation non-volatile memory devices. Schottky tunneling is proven to be responsible for electrons tunneling in these capacitors.

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Nickel nanocrystals with HfO2 blocking oxide for nonvolatile memory application

Cited by 61 publications

References 11 publications

Comparison of Nonvolatile Memory Effects in Ni-Based Layered and Dotted Nanostructures Prepared through Atomic Layer Deposition

Comparison of Nonvolatile Memory Effects in Ni-Based Layered and Dotted Nanostructures Prepared through Atomic Layer Deposition

The effect of the thickness of tunneling layer on the memory properties of (Cu2O)0.5(Al2O3)0.5 high-k composite charge-trapping memory devices

Charge storage and tunneling mechanism of Ni nanocrystals embedded HfOx film

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