Newly multiplexer-based quaternary half-adder and multiplier using CNTFETs

Shalamzari, Zahra Davari; Zarandi, Arezoo Dabbaghi; Reshadinezhad, Mohammad Reza

doi:10.1016/j.aeue.2020.153128

Cited by 20 publications

(15 citation statements)

References 18 publications

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“…As we can see from graphs in DC simulations (Fig. 7-8) there is no much diff erence between CNT (7,0), (13,0), (19,0), and (34,0). However, the V th of (7,0) is much higher compared to (34,0).In AC simulations of VDTA ( Fig.…”

Section: (N1 N2)mentioning

confidence: 71%

“…However, the V th of (7,0) is much higher compared to (34,0).In AC simulations of VDTA ( Fig. 9-10), we can observe a signifi cant increase in gain with the change of CNT chirality from (7,0) to (19,0). Between (19,0) and (34,0) there is no much diff erence in gain but the diameter changes from 1.5 nm to 2.6 nm which will drastically increase the transistor dimension as well.…”

Section: (N1 N2)mentioning

confidence: 87%

“…Low power CNTFET based RF oscillator is reported in [18]. Digital applications of CNTFET, such as adders and multipliers can be found in papers [19][20][21].…”

Section: Univerzalni Filtri In Oscilatorji Na Osnovi Napetostnega Tramentioning

confidence: 99%

“…Another reason for selecting CNT (19,0) is to compare our simulation results with other references. Because all other works also used (19,0) CNT, including the authors of the original model from [24].…”

Section: (N1 N2)mentioning

confidence: 99%

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Voltage Differencing Transconductance Amplifier based Ultra-Low Power, Universal Filters and Oscillators using 32 nm Carbon Nanotube Field Eff ect Transistor Technology

Mamatov

2021

Informacije MIDEM

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Carbon nanotube fi eld-eff ect transistor (CNTFET) is a strong candidate to replace existing silicon-based transistors. The ballistic transport of electrons in the CNTFET channel leads to ultra-low-power and high-frequency devices. Although a lot of digital applications of CNTTFET were presented, less work was done in analog applications of CNTFETs. This paper presents analog applications of CNTFET and its implementation of voltage diff erencing transconductance amplifi er (VDTA). The CNTFET VDTA based fi lters and oscillators were proposed. The VDTA circuits are resistorless and can be tuned electronically only by changing transconductance. The proposed CNTFET VDTA shows power consumption of 4000 times less than compared to silicon CMOS technology and a signifi cant reduction in chip area. All simulations were performed using SPICE and MATLAB simulation tools.

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Section: (N1 N2)mentioning

confidence: 71%

Section: (N1 N2)mentioning

confidence: 87%

“…Low power CNTFET based RF oscillator is reported in [18]. Digital applications of CNTFET, such as adders and multipliers can be found in papers [19][20][21].…”

Section: Univerzalni Filtri In Oscilatorji Na Osnovi Napetostnega Tramentioning

confidence: 99%

Section: (N1 N2)mentioning

confidence: 99%

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Voltage Differencing Transconductance Amplifier based Ultra-Low Power, Universal Filters and Oscillators using 32 nm Carbon Nanotube Field Eff ect Transistor Technology

Mamatov

2021

Informacije MIDEM

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“…[2], [3]. Among the existing new techniques, CNTFET is one of the demonstrated alternatives to CMOS transistors, which operates satisfactorily [5], [6]. It reduces transistor size and power consumption and increases the performance compared to current equivalents.…”

Section: Introductionmentioning

confidence: 99%

A Systematic Method to Design Efficient Ternary High Performance CNTFET-Based Logic Cells

2020

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The huge quantity of nodes and interconnections in modern binary circuits leads to extremely high levels of energy consumption. The interconnection complexity and other issues of binary circuits encourage researchers to consider multiple-valued logic (MVL) alternatives. Features of Carbon Nanotube Field-Effect Transistors (CNTFETs) make this technology a potential candidate to implement MVL circuits. In this article, a new systematic methodology is proposed to design ternary logic block circuits based on CNTFETs. The methodology is applied to the design of two basic logic circuits, a half adder and a 1-digit multiplier, which are evaluated through HSPICE simulations. Simulation results indicate improvements over current equivalents in transistor count and PDP mean with the half adder version of 19.2%, and 74.07% respectively, and with the 1-digit multiplier of 24.67% and 81.12% respectively.

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