2010
DOI: 10.1109/tie.2009.2039456
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New Transient Detection Circuit for On-Chip Protection Design Against System-Level Electrical-Transient Disturbance

Abstract: A new transient detection circuit for on-chip protection design against system-level electrical-transient disturbance is proposed in this paper. The circuit function to detect positive or negative electrical transients under system-level electrostatic-discharge (ESD) and electrical-fast-transient (EFT) testing conditions has been investigated by HSPICE simulation and verified in silicon chip. The experimental results in a 0.18-µm complementary-metal-oxide-semiconductor (CMOS) process have confirmed that the ne… Show more

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Cited by 14 publications
(2 citation statements)
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References 33 publications
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“…Programs providing automated steady-state computation for timeinvariant circuits (for example HSPICE or Micro-Cap 10) are not able to give accurate results for DC-DC converters. The approximations these programs introduce to evaluate current and voltage values during cycle-by-cycle simulations [8] introduce large numerical errors. The switching properties are lost in averaged linear equivalent circuits, which result useful for frequency domain analysis, but not accurate enough for timedomain simulations [10,11].…”
Section: Why To Use the Laplace Transformmentioning
confidence: 99%
“…Programs providing automated steady-state computation for timeinvariant circuits (for example HSPICE or Micro-Cap 10) are not able to give accurate results for DC-DC converters. The approximations these programs introduce to evaluate current and voltage values during cycle-by-cycle simulations [8] introduce large numerical errors. The switching properties are lost in averaged linear equivalent circuits, which result useful for frequency domain analysis, but not accurate enough for timedomain simulations [10,11].…”
Section: Why To Use the Laplace Transformmentioning
confidence: 99%
“…However, during system-level ESD test, the logic states stored in the registers or flip flops of hardware timer would be also destroyed, still causing malfunction or upset condition in the system operation. Recently, some on-chip detection circuits were developed to detect ESD-induced transient disturbance for protection design in microelectronics systems [5], [6].…”
Section: Introductionmentioning
confidence: 99%