New Material Transistor with Record-High Field-Effect Mobility among Wide-Band-Gap Semiconductors

Shih, C. W.; Chin, Albert

doi:10.1021/acsami.6b04332

Cited by 26 publications

(24 citation statements)

References 37 publications

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“…The dielectric permittivity of the domain wall was assumed to be the same as that of bulk ErMnO3 (~300), informed by literature 32 , and the carrier density of 10 13 cm -3 was inferred from our Hall voltage measurements (see below). to, or higher than, any room temperature bulk or sheet carrier mobilities seen in oxides to date [33][34][35][36] . Such high mobility systems have gained recent notoriety for their potential in applications relating to thin film transistors [33][34][35] .…”

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confidence: 82%

Large Carrier Mobilities in ErMnO₃ Conducting Domain Walls Revealed by Quantitative Hall-Effect Measurements

et al. 2018

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Kelvin probe force microscopy (KPFM) has been used to directly and quantitatively measure Hall voltages, developed at conducting tail-to-tail domain walls in ErMnO single crystals, when current is driven in the presence of an approximately perpendicular magnetic field. Measurements across a number of walls, taken using two different atomic force microscope platforms, consistently suggest that the active p-type carriers have unusually large room temperature mobilities of the order of hundreds of square centimeters per volt second. Associated carrier densities were estimated to be of the order of 10 cm. Such mobilities, at room temperature, are high in comparison with both bulk oxide conductors and LaAlO-SrTiO sheet conductors. High carrier mobilities are encouraging for the future of domain-wall nanoelectronics and, significantly, also suggest the feasibility of meaningful investigations into dimensional confinement effects in these novel domain-wall systems.

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confidence: 82%

Large Carrier Mobilities in ErMnO₃ Conducting Domain Walls Revealed by Quantitative Hall-Effect Measurements

et al. 2018

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“…Therefore, the development of high mobility metal-oxide p-TFT is crucial to embed low-power complementary logic circuits on display for system-on-panel. Previously, we pioneered very high mobility SnO 2 n-TFTs 10 – 12 . In this paper, we investigated the device performance and material property of SnO p-TFT with the same Sn material.…”

Section: Introductionmentioning

confidence: 99%

Remarkably High Hole Mobility Metal-Oxide Thin-Film Transistors

Shih

Chin²,

et al. 2018

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High performance p-type thin-film transistor (p-TFT) was realized by a simple process of reactive sputtering from a tin (Sn) target under oxygen ambient, where remarkably high field-effect mobility (μ FE ) of 7.6 cm 2 /Vs, 140 mV/dec subthreshold slope, and 3 × 10 4 on-current/off-current were measured. In sharp contrast, the SnO formed by direct sputtering from a SnO target showed much degraded μ FE , because of the limited low process temperature of SnO and sputtering damage. From the first principle quantum-mechanical calculation, the high hole μ FE of SnO p-TFT is due to its considerably unique merit of the small effective mass and single hole band without the heavy hole band. The high performance p-TFTs are the enabling technology for future ultra-low-power complementary-logic circuits on display and three-dimensional brain-mimicking integrated circuits.The metal-oxide thin-film transistors (TFTs) 1-22 have attracted much attention for next-generation display due to its high mobility in comparison to the silicon-based TFTs, good optical transparency in visible light region, and compatibility with low-temperature processes. To incorporate control integrated circuit (IC) into display and lower the power consumption, high mobility metal-oxide p-type TFT (p-TFT) is required. Such complementary n-and p-TFTs are the needed technology for tens of years since the TFT invention [17][18][19][20][21][22][23] . However, most metal-oxide TFTs 1-13 show n-type conduction. Only very few oxides such as Cu x O 14,18 , NiO x 15,16 , and SnO 20 exhibit p-type conduction with a low mobility. Therefore, the development of high mobility metal-oxide p-TFT is crucial to embed low-power complementary logic circuits on display for system-on-panel. Previously, we pioneered very high mobility SnO 2 n-TFTs 10-12 . In this paper, we investigated the device performance and material property of SnO p-TFT with the same Sn material. Using hafnium oxide (HfO 2 ) as the gate dielectric, the HfO 2 / SnO p-TFT has a high field-effect mobility (μ FE ) of 7.6 cm 2 /Vs, small 140 mV/dec subthreshold slope (SS), and 3 × 10 4 on-current/off-current (I ON /I OFF ). From the first principle quantum-mechanical calculation, the SnO is one of the best candidates for p-TFT, due to its smaller hole effective mass and unique merit without heavy hole band. The high device performance, simple process, and low-cost material make SnO the excellent candidate for future p-TFTs. ResultsFigure 1(a) and (b) show the transistor's drain-source current versus drain-source voltage (I DS -V DS ), |I DS | versus gate-source voltage (|I DS |-V GS ) and μ FE -V GS characteristics of the HfO 2 /SnO x p-TFTs, where the SnO x was formed by reactive sputter from a Sn target. Good device performance was reached at a low V DS of −1.2 V that is vital to lower the switching power of CV DS 2 f/2, where C and f are the capacitance and operation frequency, respectively. Besides, high hole μ FE of 7.6 cm 2 /Vs, a SS of 140 mV/dec, and an I ON /I OFF of 3 × 10 4 were obtained. The devic...

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“…The device μFE increases with the increase in Opp from 14.2% to 25% due to the increased oxygen content in SnOx, with x ≤ 1, and device performance degrades at a high Opp of 33.3% owing to the formation of oxygen-rich SnOx, with x > 1. Under high Opp, SnOx becomes n-type electron-conductive SnO2 [12][13][14], which lowers the hole μFE under negative VGS. The device integrity in top-gate nanosheet SnO p-TFT is also dependent on HfO2 annealing temperature.…”

Section: Resultsmentioning

confidence: 99%

“…This is because the SnO can be oxidized into oxygen-rich SnO 2 [16]. The O pp can be expressed as follows: [12][13][14], which lowers the hole µ FE under negative V GS . The Opp is critical for top-gate nanosheet SnO p-TFT, where the SnO channel was made by sputtering from a metal Sn target under different Opp conditions.…”

Section: Methodsmentioning

confidence: 99%

“…To reach low DC power consumption, both high performance n-and p-type TFTs are necessary to form the complementary metal-oxide-semiconductor (CMOS) logic. Although high-performance n-TFTs with high field-effect mobility (µ FE ), sharp subthreshold swing (SS), and large on-current/off-current (I ON /I OFF ) values [12][13][14][15] have been reported, achieving reasonable performance p-TFTs is much more challenging [16,17,36,37]. Moreover, a top-gate structure is more suitable than a conventional bottom-gate device for high integration density and easy fabrication [24][25][26].…”

Section: Introductionmentioning

confidence: 99%

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Exceedingly High Performance Top-Gate P-Type SnO Thin Film Transistor with a Nanometer Scale Channel Layer

2021

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Implementing high-performance n- and p-type thin-film transistors (TFTs) for monolithic three-dimensional (3D) integrated circuit (IC) and low-DC-power display is crucial. To achieve these goals, a top-gate transistor is preferred to a conventional bottom-gate structure. However, achieving high-performance top-gate p-TFT with good hole field-effect mobility (μFE) and large on-current/off-current (ION/IOFF) is challenging. In this report, coplanar top-gate nanosheet SnO p-TFT with high μFE of 4.4 cm2/Vs, large ION/IOFF of 1.2 × 105, and sharp transistor’s turn-on subthreshold slopes (SS) of 526 mV/decade were achieved simultaneously. Secondary ion mass spectrometry analysis revealed that the excellent device integrity was strongly related to process temperature, because the HfO2/SnO interface and related μFE were degraded by Sn and Hf inter-diffusion at an elevated temperature due to weak Sn–O bond enthalpy. Oxygen content during process is also crucial because the hole-conductive p-type SnO channel is oxidized into oxygen-rich n-type SnO2 to demote the device performance. The hole μFE, ION/IOFF, and SS values obtained in this study are the best-reported data to date for top-gate p-TFT device, thus facilitating the development of monolithic 3D ICs on the backend dielectric of IC chips.

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New Material Transistor with Record-High Field-Effect Mobility among Wide-Band-Gap Semiconductors

Cited by 26 publications

References 37 publications

Large Carrier Mobilities in ErMnO₃ Conducting Domain Walls Revealed by Quantitative Hall-Effect Measurements

Large Carrier Mobilities in ErMnO₃ Conducting Domain Walls Revealed by Quantitative Hall-Effect Measurements

Remarkably High Hole Mobility Metal-Oxide Thin-Film Transistors

Exceedingly High Performance Top-Gate P-Type SnO Thin Film Transistor with a Nanometer Scale Channel Layer

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New Material Transistor with Record-High Field-Effect Mobility among Wide-Band-Gap Semiconductors

Cited by 26 publications

References 37 publications

Large Carrier Mobilities in ErMnO3 Conducting Domain Walls Revealed by Quantitative Hall-Effect Measurements

Large Carrier Mobilities in ErMnO3 Conducting Domain Walls Revealed by Quantitative Hall-Effect Measurements

Remarkably High Hole Mobility Metal-Oxide Thin-Film Transistors

Exceedingly High Performance Top-Gate P-Type SnO Thin Film Transistor with a Nanometer Scale Channel Layer

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Large Carrier Mobilities in ErMnO₃ Conducting Domain Walls Revealed by Quantitative Hall-Effect Measurements

Large Carrier Mobilities in ErMnO₃ Conducting Domain Walls Revealed by Quantitative Hall-Effect Measurements