New Characterization Methodology of Borderless Silicon Nitride Charge Kinetic using C(V) Hysteresis Loops

Abstract

In this paper a new characterization methodology of borderless silicon nitride is presented. This material, deposited by Plasma Enhanced Chemical Vapor Deposition process, contains a large charge quantity attributed to K centres. Actually, a steady state has been searched, while taking into account charge considerations, electrical field and time influence during C(V) hysteresis. It is achieved by a capacitance versus time at constant voltage experiment, after a complete C(V) hysteresis used to set up an initial state of charge. The charge evolution occurring during stress time is related to the charge transformation kinetics. An empirical kinetic model has been extracted from these results, with time constant dependent on field and temperature. A faster positive to negative charge transformation has been shown, attributed to an easier holes trapping. Finally, this new characterization method demonstrates that data retention charge loss is correlated to trapping kinetics in borderless silicon nitride.