Negative Capacitance FinFET With Sub-20-mV/decade Subthreshold Slope and Minimal Hysteresis of 0.48 V

Ko, Eunah; Lee, Jae Woo; Shin, Changhwan

doi:10.1109/led.2017.2672967

Cited by 105 publications

(57 citation statements)

References 16 publications

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“…Through the addition of a suspended metal membrane to the solid-state MOS transistor, SG-MOSFETs achieve the reduced SS. [86,87] Moreover, to achieve superior electric performance, they can be combined with other FETs, such as 2DFETs, [88][89][90] FinFETs, [61,62] and TFETs. [20] However, complicated processes in fabrication and the problem of reliability limit the practical application of these devices.…”

Section: Ncfet To the Rescuementioning

confidence: 99%

“…[129,130] In 2015, a combination of the FinFET and NCFET structures termed NC-FinFET was proposed and experimentally verified to exhibit an SS of 55 mV dec −1 . [50,[61][62][63][64]131,132] Figure 9a,b presents the structure and test results of a relatively early NC-FinFET. [50,[61][62][63][64]131,132] Figure 9a,b presents the structure and test results of a relatively early NC-FinFET.…”

Section: Nc-finfetmentioning

confidence: 99%

“…According to the I D -V G curve, the SS of the NC-FinFET is 55 mV dec −1 at V D = 0.1 V and decreases with a higher annealing temperature. [61] Besides, the effect of the short channel, [63] the fin line-edge roughness, [133] the ferroelectric parameters, and the parasitic capacitance [64,134] of NC-FinFETs were theoretically analyzed using self-consistent simulations by employing the ferroelectric L-K and FinFET standard BSIM-CMG models. [63] Furthermore, in 2017, Pb(Zr 0.2 Ti 0.8 )O 3 NC-FinFET based on MFMIS gate structure is experimentally demonstrated to have an SS of <20 mV dec −1 with a hysteresis window of 0.48 V and a switching ratio of 10 7 ; in addition, this study points out that as source/drain extension length in the NC-FET is increased, the hysteresis window narrows.…”

Section: Nc-finfetmentioning

confidence: 99%

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Ferroelectric Negative Capacitance Field Effect Transistor

Wang

et al. 2018

Adv Elect Materials

115

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such as steep subthreshold swing (SS), high switching ratio (I on /I off ), adjustable hysteresis, compatibility with standard semiconductor fabrication processes, and environmental friendliness, promotes NCFET to be a promising candidate to lower power consumption and solve the heat problem in ULSI.As early as the 1960s, the concept of negative capacitance (NC) was proposed in amorphous semiconductor chalcogenides thin film, [25,26] then the NC effect was observed in several devices, such as p-n junctions, [27,28] Schottky diodes, [29,30] metal-insulator-metal diodes, [31] and others. [32][33][34][35] Concretely, the NC effect occurs when the reciprocal of the second derivation of potential energy U with respect to the ferroelectric polarization charge Q F is negative, which is usually achieved during the switching process of ferroelectric polarization. [36,37] NCFET achieves steep SS through the NC voltage amplification effect by adding a ferroelectric layer into the transistor gate stack. [22] NCFET simulation methods vary according to the types of transistor gate structures-metal ferroelectric semiconductor field-effect transistor (MFSFET), metal ferroelectric insulator semiconductor field-effect transistor (MFISFET), and metal ferroelectric metal insulator semiconductor field-effect transistor (MFMISFET). However, the basic principle is to realize a match between the channel charge Q and the ferroelectric polarization charge P, [38][39][40][41][42] no matter what the specific gate structure is.Furthermore, the influencing factors of NCFET's electrical properties have been qualitatively analyzed and summarized according to numerous simulation results. Commonly, a tradeoff exists between SS and hysteresis, [22] and we can design and manipulate the gate structure, [41] ferroelectric thickness (t Fe ), [22] ferroelectric material parameters, [38] silicon doping concentration, [39,43] temperature, [44] work frequency, [45][46][47][48] and high-κ dielectric [23,49,50] to optimize the electrical performance of NCFET and meet specific practical application requirement.The experimental researches on NCFETs can be mainly classified into three categories based on various kinds of ferroelectrics. First, the NCFET based on organic ferroelectric-poly(vinylidene difluoride-trifluoroethylene)[P(VDF-TrFE)], has been experimentally demonstrated, and achieves minimum SS (SS min ) = 13 mV dec −1 with small hysteresis. [51,52] Second, the NCFET based on lead zirconate titanate (PZT), a type of inorganic perovskite-type ferroelectric, exhibits hysteretic switching with With the progress in silicon circuit miniaturization, lowering power consumption becomes the major objective. Supply voltage scaling in ultralargescale integration (ULSI) is limited by the physical barrier termed "Boltzmann Tyranny." Moreover, considerable heat is inevitably generated from the ultrahighly integrated circuit. To solve these problems, a ferroelectric negative capacitance field-effect transistor (Fe-NCFET) is proposed in order to reduce the subthresho...

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Section: Ncfet To the Rescuementioning

confidence: 99%

Section: Nc-finfetmentioning

confidence: 99%

Section: Nc-finfetmentioning

confidence: 99%

See 1 more Smart Citation

Ferroelectric Negative Capacitance Field Effect Transistor

Wang

et al. 2018

Adv Elect Materials

115

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show abstract

“…In the near future, it is necessary to design the optimal ferroelectric capacitor in terms of the CMOS-compatible material and/or its thickness, and thereafter, the sub-60-mV/decade steep switching and hysteresis-free NCFET can be implemented. (2) The capacitance of baseline device can be appropriately controlled for hysteresis-free operation [ 20 , 26 , 37 ]. In this case, the device parameters that can be adjusted would be varied depending on the device architecture of baseline device.…”

Section: Negative (Differential) Capacitance Field Effect Transistor mentioning

confidence: 99%

“…As mentioned before, the exploratory study on NCFET has begun in 2008. Afterwards, many works have been followed, such as (i) the verification work of negative capacitance phenomenon and the steep switching effect [ 11 – 18 ], (ii) the engineering work to control the hysteresis window [ 20 , 26 , 37 ], (iii) the work for compatibility to current CMOS processes [ 38 – 45 ], (iv) experimental and theoretical studies of capacitance-matching conditions required for stable and reliable operation [ 53 , 54 ], and (v) modelling for circuit designs [ 55 – 60 ]. Many studies have supported how to adopt NCFET as future ultra-low power logic transistor.…”

Section: Negative (Differential) Capacitance Field Effect Transistor mentioning

confidence: 99%

Steep switching devices for low power applications: negative differential capacitance/resistance field effect transistors

Shin

2018

Nano Convergence

Self Cite

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Simply including either single ferroelectric oxide layer or threshold selector, we can make conventional field effect transistor to have super steep switching characteristic, i.e., sub-60-mV/decade of subthreshold slope. One of the representative is negative capacitance FET (NCFET), in which a ferroelectric layer is added within its gate stack. The other is phase FET (i.e., negative resistance FET), in which a threshold selector is added to an electrode (e.g., source or drain) of conventional field effect transistor. Although the concept of the aforementioned two devices was presented more or less recently, numerous studies have been published. In this review paper, by reviewing the published studies over the last decade, we shall de-brief and discuss the history and the future perspectives of NCFET/phase FET, respectively. The background, experimental investigation, and future direction for developing the aforementioned two representative steep switching devices (i.e., NCFET and phase FET/negative resistance FET) are to be discussed in detail.

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Emerging Fet Architectures

Sahay¹,

Kumar²

2019

Junctionless Field‐Effect Transistors

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Negative Capacitance FinFET With Sub-20-mV/decade Subthreshold Slope and Minimal Hysteresis of 0.48 V

Cited by 105 publications

References 16 publications

Ferroelectric Negative Capacitance Field Effect Transistor

Ferroelectric Negative Capacitance Field Effect Transistor

Steep switching devices for low power applications: negative differential capacitance/resistance field effect transistors

Emerging Fet Architectures

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