Near void-free no-flow underfill flip chip on board assembly technology reliability characterization

Colella, M.; Baldwin, D.F.

doi:10.1109/iemt.2004.1321666

IEEE/CPMT/SEMI 29th International Electronics Manufacturing Technology Symposium (IEEE Cat. No.04CH37585)

DOI: 10.1109/iemt.2004.1321666

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Near void-free no-flow underfill flip chip on board assembly technology reliability characterization

M. Colella

D.F. Baldwin

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Near void-free no-flow underfill flip chip on board assembly technology reliability characterization

Cited by 1 publication

References 12 publications

Development of a non-conductive, no-flow wafer level underfill

Development of a non-conductive, no-flow wafer level underfill

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