Development of a non-conductive, no-flow wafer level underfill

Su, Chan-Lu; Yeh, Kuo Yu; Lin, Chang Chih

doi:10.1109/ectc.2011.5898758

Cited by 5 publications

(3 citation statements)

References 2 publications

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“…There were large areas of voids in Profile 4 and some voids in Profile 3. We assumed that higher step temperature or non-step bonding tend to generate In the case of pre-applied underfills such as no-flow type underfill (NUF) and non-conducive film (NCF), higher bonding pressure than 20 MPa per bump is required to push out the underfill on bumps 7,8) . However, high bonding pressure is incompatible for the increasing fine pitch bumps because of the pressure limit and planarization issue of bonding instrument.…”

Section: Assembly Structure and Experimental Materialsmentioning

confidence: 99%

Assembly Technology for Fine Pitch Bumps Using Photodefinable Wafer-Level Underfill

Mitsukura

Minegishi

Hatakeyama

et al. 2017

Journal of Smart Processing

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Photodefinable wafer-level underfill (PWLUF) has been developed to avoid the underfill entrapment which causes mechanical and electrical reliability issues with fine bumps. In this paper, firstly, we report the appropriate stacking profile to obtain voidfree stacks, explaining the PWLUF process flow and the melt viscosity after patterning. Secondly, the lower pressure soldering on thermal compression and collective reflow soldering without any underfill entrapment were demonstrated. It means that this PWLUF was designed to have enough low viscosity after photo-curing for patterning. The stacked sample has enough high adhesive strength even after moisture absorption and passed moisture sensitivity level 2 (JEDEC MSL2). Finally, we demonstrated the compatibility with Cu-Cu bonding application comparing with conventional no-flow type underfills (NUF).

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Section: Assembly Structure and Experimental Materialsmentioning

confidence: 99%

Assembly Technology for Fine Pitch Bumps Using Photodefinable Wafer-Level Underfill

Mitsukura

Minegishi

Hatakeyama

et al. 2017

Journal of Smart Processing

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“…There are several underfill process flow options as well. [80][81][82][83] The most commonly used underfill methods for TSI assembly are non-conductive paste (NCP) and capillary underfill (CUF). The NCP is applied during flip chip attach and can only be used in conjunction with TCB assembly, while the CUF is used after the flip chip attach is done and can be used in conjunction with both TCB and mass reflow chip attach processes.…”

Section: B Tsi Package Assembly Process Flowmentioning

confidence: 99%

Heterogeneous 2.5D integration on through silicon interposer

Zhang¹,

Lin²,

Wickramanayaka³

et al. 2015

Applied Physics Reviews

124

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“…It can be found in literature demonstrations of the coating and thermocompression feasibility of WLUF [6,7]. Su et al [8] have even demonstrated lamination and package assembly feasibility in fine dimensions stacks (35µm high interconnects separated by 60µm). Some reliability performances of WLUF materials have been shown.…”

Section: Introductionmentioning

confidence: 96%

Performances of Wafer-Level UnderFill with 50µm pitch interconnections: Comparison with conventional underfill

Taluy

Lhostis

Jouve

et al. 2011

2011 IEEE 13th Electronics Packaging Technology Conference

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This paper deals with the performances of Wafer-Level UnderFill in ultra-fine 50 microns pitch interconnections. Firstly, dry-film WLUF assembly feasibility has been demonstrated by checking lamination and planarity in the pillar areas. Well-formed Pb-free joints have been obtained after thermocompression with limited void or WLUF entrapment. Secondly, to have a better understanding of this innovative material performances during thermal and moisture tests, the electrical behavior of Copper pillars chains surrounded by WLUF has been compared with those surrounded by classic Capillary Underfill used in the semiconductor industry. We have successfully demonstrated that chains surrounded by WLUF are stable during JEDEC level 4 preconditioning and moisture storage. During thermal cycling, behavior variation of chains surrounded by WLUF has been observed, depending on interconnects quantity. However, electrical performances of the longest 100 pillars chain respond to industrial specifications and are similar for both underfill. After thermal and moisture tests, a good adhesion of WLUF stacks has been verified by shear tests. Those results have demonstrated the pertinence of this innovative WLUF material with 50µm pitch interconnections.

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Development of a non-conductive, no-flow wafer level underfill

Cited by 5 publications

References 2 publications

Assembly Technology for Fine Pitch Bumps Using Photodefinable Wafer-Level Underfill

Assembly Technology for Fine Pitch Bumps Using Photodefinable Wafer-Level Underfill

Heterogeneous 2.5D integration on through silicon interposer

Performances of Wafer-Level UnderFill with 50µm pitch interconnections: Comparison with conventional underfill

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Development of a non-conductive, no-flow wafer level underfill

Cited by 5 publications

References 2 publications

Assembly Technology for Fine Pitch Bumps Using Photodefinable Wafer-Level Underfill

Assembly Technology for Fine Pitch Bumps Using Photodefinable Wafer-Level Underfill

Heterogeneous 2.5D integration on through silicon interposer

Performances of Wafer-Level UnderFill with 50&#x00B5;m pitch interconnections: Comparison with conventional underfill

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Performances of Wafer-Level UnderFill with 50µm pitch interconnections: Comparison with conventional underfill