Near-Ideal Top-Gate Controllability of InGaZnO Thin-Film Transistors by Suppressing Interface Defects with an Ultrathin Atomic Layer Deposited Gate Insulator

Abstract

An ultrathin atomic-layer-deposited (ALD) AlO x gate insulator (GI) was implemented for self-aligned top-gate (SATG) amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs). Although the 4.0-nm thick AlO x exhibited ideal insulating properties, the interaction between ALD AlO x and predeposited a-IGZO caused a relatively defective interface, thus giving rise to hysteresis and bias stress instabilities. As analyzed using high-resolution transmission electron microscopy, X-ray photoelectron spectroscopy, and the Hall measurement, the chemical reaction between the ALD precursor and a-IGZO is revealed. This was effectively prevented by preoxidizing a-IGZO with nitrous oxide (N2O) plasma. With 4 nm-AlO x GI and low-defect interfaces, high performance and stability were simultaneously achieved on SATG a-IGZO TFTs, including a near-ideal record-low subthreshold swing of 60.8 mV/dec, a low operation voltage below 0.4 V, a moderate mobility of 13.3 cm2/V·s, a low off-current below 10–13 A, a large on/off ratio over 109, and negligible threshold-voltage shifts less than 0.04 V against various bias-temperature stresses. This work clarifies the vital interfacial reaction between top-gate high-k dielectrics and amorphous oxide semiconductors (AOSs) and further provides a feasible way to remove this obstacle to downscaling SATG AOS TFTs.

3‐Masks‐Processed Sub‐100 nm Amorphous InGaZnO Thin‐Film Transistors for Monolithic 3D Capacitor‐Less Dynamic Random Access Memories

“…[55] Deeper trap states may get charged under larger V GS stress, causing a more significant shift of sweep curves. The N 2 O-eliminated hysteresis could be associated with the reduction of various defects at the a-IGZO/AlO x interface, such as V O , -OH, and metal interstitial (M i ), [41] thus suggesting a relative immunity of N 2 O-passivated a-IGZO to the subsequent ALD-activated chemical reactions. Nevertheless, even with a 2.4-nmEOT of optimized ALD AlO x , a noteworthy "SCE" was still observed on SATG a-IGZO TFTs with L g shrinking from 0.8 to 0.2 μm (Figure S4a, Supporting Information).…”

“…For the ALD AlO x ‐gated TFT, the replacement of H 2 O with O 3 could achieve an improved SS, a more positive V TH , and a much lower I G (Figure 2a), due to the suppressed hydroxyl (–OH) residuals in the dry oxidized AlO x . [ 41 ] Compared to the AlO x (O 3 +TMA)‐gated a‐IGZO transistor, the EOT of HfO x (O 3 +TDMAHf) GI can be further thinned to 1.7 nm (Figure S1, Supporting Information), while the electrical characteristics are quite similar, except for the dramatically increased I G and much higher N it , as summarized in Figure 2c and Table 1 . This inferior performance could be plausibly attributed to the insufficient band offset and a highly defective interface between HfO x GI and a‐IGZO channel.…”

“…[ 55 ] Deeper trap states may get charged under larger V GS stress, causing a more significant shift of sweep curves. The N 2 O‐eliminated hysteresis could be associated with the reduction of various defects at the a‐IGZO/AlO x interface, such as V O , –OH, and metal interstitial (M i ), [ 41 ] thus suggesting a relative immunity of N 2 O‐passivated a‐IGZO to the subsequent ALD‐activated chemical reactions.…”

“…The resultant abundant defects in the a-IGZO active layer or at the channel/GI interface give rise to an increased off-state current (I OFF ), large hysteresis, and poor bias stabilities. [41][42][43] Another bottleneck for nanoscale SATG a-IGZO TFTs is the formation of abrupt S/D homojunctions. The n + -IGZO S/D is usually populated by the oxygen vacancy (V O ) or hydrogen (H) species through the plasma treatments, [44,45] metal-induced metallization, [46] H doping, [47] or other methods.…”

“…The resultant abundant defects in the a‐IGZO active layer or at the channel/GI interface give rise to an increased off‐state current ( I OFF ), large hysteresis, and poor bias stabilities. [ 41–43 ]…”