NCFET-Aware Voltage Scaling

Abstract

Negative Capacitance Field-Effect Transistor (NCFET) has recently attracted significant attention. In the NCFET technology with a thick ferroelectric layer, voltage reduction increases the leakage power, rather than decreases, due to the negative Drain-Induced Barrier Lowering (DIBL) effect. This work is the first to demonstrate the far-reaching consequences of such an inverse dependency w.r.t. the existing power management techniques. Moreover, this work is the first to demonstrate that state-of-the-art Dynamic Voltage Scaling (DVS) techniques are sub-optimal for NCFET. Our investigation revealed that the optimal voltage at which the total power is minimized is not necessarily at the point of the minimum voltage required to fulfill the performance constraint (as in traditional DVS). Hence, an NCFET-aware DVS is key for high energy efficiency. In this work, we therefore propose the first NCFET-aware DVS technique that selects the optimal voltage to minimize the power following the dynamics of workloads. Our experimental results of a multi-core system demonstrate that NCFET-aware DVS results in 20% on average, and up to 27% energy saving while still fulfilling the same performance constraint (i.e., no trade-offs) compared to traditional NCFET-unaware DVS techniques.

Impact of Negative Capacitance Field-Effect Transistor (NCFET) on Many-Core Systems

“…Unawareness of NCFET and its trade-off could lead to not minimize the total power consumption. Therefore, in this section, a novel NCFET-aware voltage scaling technique is presented [17] to overcome the shortness that traditional DVS has in NCFET-based processors.…”

“…Algorithm 1 NCFET-aware voltage scaling algorithm to select the optimal voltage (V opt ) at runtime [17] Require: Power and performance models: P peak dyn (c, d) and P leak (V ), current operating voltage V c and delay d, current power consumption P curr , min. voltage resolution Ensure: Optimal operating voltage V opt 1:…”

Energy Optimization in NCFET-based Processors

“…Note that the minimum energy could be achieved at a higher voltage than V min which is required to sustain f opt . Therefore, V opt (f opt ) is the optimal voltage for operating at f opt [7].…”

“…We then use commercial signoff tools to analyze the power and frequency of the full SoC. Finally, and similar to [7], we fitted the results into mathematical equations to use them in our models.…”

“…The study in [2] showed how NCFETs impact the performance, power and temperature of a processor. In [7], a dynamic voltage scaling (DVS) technique has been proposed to optimize the power consumption of NCFET many-core systems under fixed performance constraint. The work assumes a constant frequency and hence it only scales the voltage standalone.…”