Nb-Doped &lt;inline-formula&gt; &lt;tex-math notation="TeX"&gt;$\hbox{La}_{2}\hbox{O}_{3} $&lt;/tex-math&gt;&lt;/inline-formula&gt; as Charge-Trapping Layer for Nonvolatile Memory Applications

Shi, Runpu; Huang, Xiaodong; Leung, C.; Sin, J.K.O.; Lai, P. T.

doi:10.1109/tdmr.2014.2376514

Cited by 7 publications

(2 citation statements)

References 32 publications

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“…The main methods to solve this problem are: (i) nitrogen incorporation, which has been reported to induce traps in the bandgap and also remove shallow traps along the grain boundaries in CTLs [83]; (ii) doping other high-k material (e.g. Nb 2 O 5 , TiO 2 ), which is another way to increase the deep-level trap density in La 2 O 3 and suppress its reaction with the SiO 2 TL as well [84]; (iii) multi-CTL for band engineering, which is capable of enhancing charge-trapping efficiency [85] and improving device reliability by suppressing the impact of TL degradation [86]. Experimentally, these methods have all been studied, and the results in Figure 14 [61,84,[87][88][89][90] show obvious improvements in the performance of the memory device.…”

Section: Nonvolatile Memorymentioning

confidence: 99%

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Advances in La-Based High-k Dielectrics for MOS Applications

2019

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This paper reviews the studies on La-based high-k dielectrics for metal-oxide-semiconductor (MOS) applications in recent years. According to the analyses of the physical and chemical characteristics of La2O3, its hygroscopicity and defects (oxygen vacancies, oxygen interstitials, interface states, and grain boundary states) are the main problems for high-performance devices. Reports show that post-deposition treatments (high temperature, laser), nitrogen incorporation and doping by other high-k material are capable of solving these problems. On the other hand, doping La into other high-k oxides can effectively passivate their oxygen vacancies and improve the threshold voltages of relevant MOS devices, thus improving the device performance. Investigations on MOS devices including non-volatile memory, MOS field-effect transistor, thin-film transistor, and novel devices (FinFET and nanowire-based transistor) suggest that La-based high-k dielectrics have high potential to fulfill the high-performance requirements in future MOS applications.

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Section: Nonvolatile Memorymentioning

confidence: 99%

“…CTM with La-based high-k CTL: (a) memory window, (b) P/E transient characteristics, and (c) retention property[61,84,[87][88][89][90].…”

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confidence: 99%

Advances in La-Based High-k Dielectrics for MOS Applications

2019

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High-k Dielectric for Nanoscale MOS Devices

Qian

2017

Outlook and Challenges of Nano Devices, Sensors, and MEMS

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Enhanced charge trapping characteristics through composite high-k material phase separation

Chai,

Zhu,

Chen

2023

Applied Physics Letters

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Charge trapping memory with the P-Si/Al2O3/LaTiO/Al2O3/Pt structure was fabricated by a pulsed laser deposition system. An innovative high-k nanocrystal-amorphous phase structure could be stably formed in the charge trapping layer. The La2O3 nanocrystals are embedded in amorphous TiO2. Numerous charge traps are generated at the phase interface, which could significantly increase the charge trapping capability. A larger memory window of 16.56 V at ±12 V sweep voltage is observed, comparing with a lower value of 5.52 V for the simple amorphous structure. The device also demonstrated excellent stability, with only a 13% charge loss rate after 10 years and an unchanged memory window after 105 program/erase cycles. It is attributed to the structure that the amorphous phase isolates the trapped electrons around the nanocrystal and, thus, is resistant to loss. This work could provide an approach to generating charge traps by phase separation of high-k materials for future nonvolatile memory applications.

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Nb-Doped <inline-formula> <tex-math notation="TeX">$\hbox{La}_{2}\hbox{O}_{3} $</tex-math></inline-formula> as Charge-Trapping Layer for Nonvolatile Memory Applications

Cited by 7 publications

References 32 publications

Advances in La-Based High-k Dielectrics for MOS Applications

Advances in La-Based High-k Dielectrics for MOS Applications

High-k Dielectric for Nanoscale MOS Devices

Enhanced charge trapping characteristics through composite high-k material phase separation

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