Nanowire transistors without junctions

Abstract

All existing transistors are based on the use of semiconductor junctions formed by introducing dopant atoms into the semiconductor material. As the distance between junctions in modern devices drops below 10 nm, extraordinarily high doping concentration gradients become necessary. Because of the laws of diffusion and the statistical nature of the distribution of the doping atoms, such junctions represent an increasingly difficult fabrication challenge for the semiconductor industry. Here, we propose and demonstrate a new type of transistor in which there are no junctions and no doping concentration gradients. These devices have full CMOS functionality and are made using silicon nanowires. They have near-ideal subthreshold slope, extremely low leakage currents, and less degradation of mobility with gate voltage and temperature than classical transistors.

Chemical approaches for doping nanodevice architectures

“…However, work must continue into applications of the MLD process on new device architectures such as junction-less transistors and gate-all-around transistors. [65,66] Aside from microelectronics, the MLD process has also been successfully applied with great success to solar cell materials and optoelectronic materials. Concurrently, there is a need for innovative improvements to metrological techniques to be made in order for the ultra-shallow junctions to be characterised to ensure conformality and abruptness.…”

Characterization of a junctionless diode

“…The mechanism of the leakage current is discussed using the activation energy (E A The junctionless (JL) metal-oxide-semiconductor fieldeffect transistor (MOSFET) has been recently introduced and is a promising candidate for end-of-roadmap complementary metal-oxide-semiconductor (CMOS) circuit fabrication. 1,2 In a JL transistor, the doping concentration is constant through the source, and channel and drain are doped. Typical doping concentration is in the range of few 10 19 cm À3 .…”

Junctionless 6T SRAM cell

“…To overcome the technological difficulties in the formation of ultra-sharp S/D extension regions in nanoscale devices, the concept of the junctionless (JL) MOS transistor in silicon-on-insulator (SOI) and bulk technologies has been recently reported [1][2][3]. The JL transistor is an MOS device where the channel doping is the same as that of heavily doped S/D regions.…”