Nano-PPUF: A Memristor-Based Security Primitive

Rajendran, Jeyavijayan; Rose, Garrett S.; Karri, Ramesh; Potkonjak, Miodrag

doi:10.1109/isvlsi.2012.40

Cited by 91 publications

(88 citation statements)

References 18 publications

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“…Utilizing nanotechnologies for PUFs has been proposed recently [15] [16]. We progress this research by simulating our design and demonstrating its resilience to security attacks.…”

Section: B Nanotechnologymentioning

confidence: 97%

The bidirectional polyomino partitioned PPUF as a hardware security primitive

Wendt

Potkonjak

2013

2013 IEEE Global Conference on Signal and Information Processing

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Abstract-Physical unclonable functions (PUFs) have demonstrated great potential as fast and robust hardware security primitives. Public physical unclonable functions (PPUFs) have removed the main conceptual limitations of PUFs by enabling the creation of public key protocols. Traditional methods of constructing PPUFs leverage intrinsic process variation in submicron integrated circuits. However, these implementations impose high power usage and require long simulation times, producing high latency protocols. We propose to use next generation CMOScompatible technologies, such as memristors and nanowires, whose components exhibit non-linear circuit characteristics, for the creation of PPUFs. We utilize the bidirectional nature of these components and introduce a novel architecture of PPUF polyomino partitioning. Furthermore, we present new security protocols that authenticate orders of magnitude faster than their CMOS-based PPUF counterparts. We simulate the design and demonstrate its resilience to a host of attacks using SPICE circuit simulation.

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“…Utilizing nanotechnologies for PUFs has been proposed recently [15] [16]. We progress this research by simulating our design and demonstrating its resilience to security attacks.…”

Section: B Nanotechnologymentioning

confidence: 97%

The bidirectional polyomino partitioned PPUF as a hardware security primitive

Wendt

Potkonjak

2013

2013 IEEE Global Conference on Signal and Information Processing

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“…shorter pulse widths and lower voltage amplitudes, are analyzed for the generation of random bits. The crossbar array was leveraged to build a public PUF (PPUF) in [14].…”

Section: Rrams For Hardware Intrinsic Securitymentioning

confidence: 99%

RRAM based random bit generation for hardware security applications

Arumí

Manich

Rodríguez-Montañés

et al. 2016

2016 Conference on Design of Circuits and Integrated Systems (DCIS)

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Abstract-Resistive random access memories (RRAMs) have arisen as a competitive candidate for non-volatile memories due to their scalability, simple structure, fast switching speed and compatibility with conventional back-end processes. The stochastic switching mechanism and intrinsic variability of RRAMs still poses challenges that must be overcome prior to their massive memory commercialization. However, these very same features open a wide range of potential applications for these devices in hardware security. In this context, this work proposes the generation of a random bit by means of simultaneous write operation of two parallel cells so that only one of them unpredictably switches its state. Electrical simulations confirm the strong stochastic behavior and stability of the proposed primitive. Exploiting this fact, a Physical Unclonable Function (PUF) like primitive is implemented based on modified 1 transistor -1 resistor (1T1R) array structure.

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“…In security this problem can be overcome by specifying a communication time window that is enough for the receiver to adjust the wrong bits of the key while it is not sufficient for the attacker to guess the key. 13 In order to increase the efficiency of the approach proposed in this work, we suggest to overcome the AIP Advances 6, 025107 (2016) impact of the process variations by extracting the keys using the shared area under the generated profiles (see shaded area in Fig. 9).…”

Section: B Impact Of Process Variationsmentioning

confidence: 99%

“…[12][13][14][15][16][17][18] • Provide perfect security via the key size, which can be tuned to match the message length.…”

Section: Introductionmentioning

confidence: 99%

Novel secret key generation techniques using memristor devices

et al. 2016

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This paper proposes novel secret key generation techniques using memristor devices. The approach depends on using the initial profile of a memristor as a master key. In addition, session keys are generated using the master key and other specified parameters. In contrast to existing memristor-based security approaches, the proposed development is cost effective and power efficient since the operation can be achieved with a single device rather than a crossbar structure. An algorithm is suggested and demonstrated using physics based Matlab model. It is shown that the generated keys can have dynamic size which provides perfect security. Moreover, the proposed encryption and decryption technique using the memristor based generated keys outperforms Triple Data Encryption Standard (3DES) and Advanced Encryption Standard (AES) in terms of processing time. This paper is enriched by providing characterization results of a fabricated microscale Al/TiO2/Al memristor prototype in order to prove the concept of the proposed approach and study the impacts of process variations. The work proposed in this paper is a milestone towards System On Chip (SOC) memristor based security.

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Nano-PPUF: A Memristor-Based Security Primitive

Cited by 91 publications

References 18 publications

The bidirectional polyomino partitioned PPUF as a hardware security primitive

The bidirectional polyomino partitioned PPUF as a hardware security primitive

RRAM based random bit generation for hardware security applications

Novel secret key generation techniques using memristor devices

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