2022
DOI: 10.1038/s41598-022-07368-0
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NAND and NOR logic-in-memory comprising silicon nanowire feedback field-effect transistors

Abstract: The processing of large amounts of data requires a high energy efficiency and fast processing time for high-performance computing systems. However, conventional von Neumann computing systems have performance limitations because of bottlenecks in data movement between separated processing and memory hierarchy, which causes latency and high power consumption. To overcome this hindrance, logic-in-memory (LIM) has been proposed that performs both data processing and memory operations. Here, we present a NAND and N… Show more

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Cited by 7 publications
(7 citation statements)
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References 42 publications
(33 reference statements)
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“…Deep learning has become the mainstream of machine learning, and with the expansion of its applications, technical problems from the perspective of real-world problem solving have also emerged, primarily the black box problem: neural network machinelearning in deep learning is a black box [130][131][132][133][134][135][136][137][138][139][140][141][142][143][144]. The learning results are reflected in the node weights, and the obtained regularities and models are not represented in a form that humans can directly understand.…”
Section: Black Box Problemmentioning
confidence: 99%
“…Deep learning has become the mainstream of machine learning, and with the expansion of its applications, technical problems from the perspective of real-world problem solving have also emerged, primarily the black box problem: neural network machinelearning in deep learning is a black box [130][131][132][133][134][135][136][137][138][139][140][141][142][143][144]. The learning results are reflected in the node weights, and the obtained regularities and models are not represented in a form that humans can directly understand.…”
Section: Black Box Problemmentioning
confidence: 99%
“…[12][13][14][15][16] Recently, feedback field-effect transistors (FBFETs) that operate via positive feedback (PF) loop mechanisms have attracted DOI: 10.1002/aelm.202300132 attention for LIM. [17][18][19][20] PF loops are generated or eliminated in the channels because of the recursive mutual interaction between the carrier injection and potential barriers. This enables the transistors to feature steep switching and memory characteristics.…”
Section: Introductionmentioning
confidence: 99%
“…[14][15][16][17] FBFETs with a configuration of complementary metaloxide-semiconductor logic gates perform inverting and NAND/NOR logic operations and they memorize their logic outputs. [18][19][20][21][22] Moreover, FBFETs can also be utilized for reconfigurable logic gates with multi-gated structures. These devices can be reconfigured in n-channel or p-channel modes; electrostatic doping induced by gate bias enables the reconfiguration.…”
Section: Introductionmentioning
confidence: 99%