N7 dark field two-bar in 0.33NA EUVL: Mitigation of CD Bossung tilts caused by strong coupling between the feature's primary and 1st self-image

Adrichem, Paul van; Winter, Laurens de; Hsu, Stephen; Finders, Jo; Wittebrood, Friso; Kerkhof, Mark van de

doi:10.1117/12.2257463

Cited by 5 publications

(5 citation statements)

References 2 publications

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“…We use 248 nm deep ultraviolet (DUV) lithography technology, which is sufficient to pattern junctions with critical dimensions of a few 100 nm. However, higher-end technologies could be used in the future to enable enhanced control over the junction critical dimension [21,22]. After JJ pillar formation, a RES layer is patterned which defines most of the structures on a superconducting qubit device (Fig.…”

Section: Towards Cmos-compatible Qubit Manufacturingmentioning

confidence: 99%

“…The key challenge for fabricating high performing (high coherence) and low variability Josephson junctions, and consequently superconducting qubits, is to maintain the uniformity of the wafer-scale Josephson junction barrier in the subsequent junction patterning steps and the final oxide removal step. As shown before [20], junction uniformity for CDs below 400 nm is limited by the feature patterning variability, which can be significantly improved by using more advanced lithographic processes such as 192 nm immersion lithography or extreme ultraviolet (EUV) lithographic technologies [21,22]. Patterning uniformity can also be enhanced with passive dummy structures, typically used for wafer patterning, that ensure uniform layer densities.…”

Section: Towards Cmos-compatible Qubit Manufacturingmentioning

confidence: 99%

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Key ingredients for manufacturing superconducting quantum processors at scale

Last¹,

Mongillo²,

Ivanov³

et al. 2023

Novel Patterning Technologies 2023

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Computational ecosystems in which classical supercomputers and general-purpose quantum computers provide a steady increase in value-creating computation capabilities have shown immense progress in recent years. Superconducting qubit technology, in particular, has emerged as a leading candidate for realizing a scalable quantum computing platform ready for paving the way to commercial quantum advantage. However, current academic approaches in fabrication and testing of quantum devices are not scalable and have already started to limit the rapid development of the field. Novel solutions are required to tackle the combined challenge of increasing the qubit count on a quantum processor and the need to further reduce the qubit’s error rates. This, in turn, will lead to a renewed acceleration in qubit manufacturing, test and diagnostics. Here we present aspects of how to move superconducting qubit manufacturing and testing from small-scale laboratory to large-scale fabrication facility environments. To enable this transfer, two key ingredients are demonstrated: (i) A foundry-compatible fabrication process of superconducting qubits that can benefit from the advanced process control in industry-scale CMOS fabrication facilities, and (ii) an acceleration of testing and cryogenic measurement throughput by using a milli-Kelvin cryo-CMOS signal multiplexer operating in near proximity to quantum devices and integrated qubit diagnostic and benchmarking tools with end-to-end data analytics. Although some of these elements have been explored independently, co-development is crucial to enable an efficient scalable development cycle for quantum computing technology. A full development cycle consisting of scalable manufacturing, testing, and benchmarking will enable the large-scale fabrication and control of quantum computing devices and thus pave the way to commercial quantum advantage.

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Section: Towards Cmos-compatible Qubit Manufacturingmentioning

confidence: 99%

Section: Towards Cmos-compatible Qubit Manufacturingmentioning

confidence: 99%

Key ingredients for manufacturing superconducting quantum processors at scale

Last¹,

Mongillo²,

Ivanov³

et al. 2023

Novel Patterning Technologies 2023

View full text Add to dashboard Cite

show abstract

“…Two-bar CD asymmetry through focus is also a known M3D effect: 24 through focus, the CD between the upper and lower bars is behaving asymmetrically. Figure 12 visualizes the aerial image asymmetry of a horizontal two-bar pitch of 36 nm.…”

Section: Imaging Simulations Of Generic Building Blocks At 033 Namentioning

confidence: 99%

Reducing extreme ultraviolet mask three-dimensional effects by alternative metal absorbers

Philipsen

Luong

Souriau

et al. 2017

J. Micro/Nanolith. MEMS MOEMS

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Over the recent years, extreme ultraviolet (EUV) lithography has demonstrated the patterning of ever-shrinking feature sizes (enabling the N7 technology node and below), whereas the EUV mask has remained unaltered, using a 70-nm tantalum (Ta)-based absorber. This has led to experimentally observed mask three-dimensional (M3D) effects at the wafer level, which are induced by the interaction between the oblique incident EUV light and the patterned absorber with typical thickness values on the order of several wavelengths. We exploit the optical properties of the absorber material of the EUV mask as an M3D mitigation strategy. Using rigorous lithographic simulations, we screen potential single-element absorber materials for their optical properties and optimal thickness for minimum best focus variation through pitch at the wafer level. In addition, the M3D mitigation by absorber material is evaluated by process window comparison of foundry N5-specific logic clips. To valid ate the rigorous simulation predictions and test the processing feasibility of the alternative absorber materials, we have selected the candidate single elements nickel and cobalt for an experimental evaluation on wafer substrates. We present the film characterization as well as the first patterning tests of these single-element candidate absorber materials

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“…3,4 Besides standard resolution enhancements already used in DUV [5][6][7] and novel photoresist materials and processes, 8,9 several EUV-specific optical resolution enhancements are being investigated. Dedicated asymmetric illumination schemes 4,10,11 and novel absorber materials [12][13][14] are employed to compensate for contrast fading, best focus shifts, and other effects caused by light diffraction from 3D masks -"mask 3D effects". This paper explores another recently proposed EUV-specific optical resolution enhancement technique by various modeling approaches.…”

Section: Introductionmentioning

confidence: 99%

Exploring the limits of high contrast contact imaging using split pupil exposures in high-NA EUV lithography

Erdmann,

Mesilhy,

Evanschitzky

et al. 2024

Optical and EUV Nanolithography XXXVII

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The lithographic imaging performance of contact holes is limited by the efficient use of light and contrast fading caused by 3D mask effects. "Split pupil" exposures have been proposed to mitigate contrast fading for linespace-patterns. 1 We present a simulation study investigating the extendibility of split pupil exposures to dense arrays of contacts on dark field and light field masks using different mask absorber options. Our simulations indicate that the combination of split pupil exposures and low-n/low-k absorbers can offer comfortable imaging performance for arrays of 10 nm square contacts with a pitch of 20 nm on a dark field mask. These results indicate the potential of combining low-n absorbers and split pupil exposure strategies to enable high-NA EUV lithography to reach its ultimate optical resolution limits.

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N7 dark field two-bar in 0.33NA EUVL: Mitigation of CD Bossung tilts caused by strong coupling between the feature's primary and 1st self-image

Cited by 5 publications

References 2 publications

Key ingredients for manufacturing superconducting quantum processors at scale

Key ingredients for manufacturing superconducting quantum processors at scale

Reducing extreme ultraviolet mask three-dimensional effects by alternative metal absorbers

Exploring the limits of high contrast contact imaging using split pupil exposures in high-NA EUV lithography

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