Multilayer Graphene FET Compact Circuit-Level Model With Temperature Effects

Umoh, Ime J.; Kázmierski, Tom J.; Al-Hashimi, Bashir M.

doi:10.1109/tnano.2014.2323129

Cited by 17 publications

(5 citation statements)

References 32 publications

(61 reference statements)

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“…Compared to single-layer structure in bilayer GFET, there is an interlayer capacitance between two quantum capacitances, as shown in Figure 2a According to the equivalent capacitance model of bilayer graphene FET from Figure 1b, surface potential for the first and second layer is [21]…”

Section: Surface Potential Calculation For Bilayer Graphene Fetmentioning

confidence: 99%

“…This model is a combination of fundamental theories for single-layer and bilayer graphene FET. In previous literature [20,21], properties for single-and bilayer graphene FET were represented individually. In [22], a small signal model was used to show the GFET equivalent circuit without considering the effect of surface potential and number of layers.…”

Section: Introductionmentioning

confidence: 99%

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Equivalent Circuit Modeling of a Dual-Gate Graphene FET

2020

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This paper presents a simple and comprehensive model of a dual-gate graphene field effect transistor (FET). The quantum capacitance and surface potential dependence on the top-gate-to-source voltage were studied for monolayer and bilayer graphene channel by using equivalent circuit modeling. Additionally, the closed-form analytical equations for the drain current and drain-to-source voltage dependence on the drain current were investigated. The distribution of drain current with voltages in three regions (triode, unipolar saturation, and ambipolar) was plotted. The modeling results exhibited better output characteristics, transfer function, and transconductance behavior for GFET compared to FETs. The transconductance estimation as a function of gate voltage for different drain-to-source voltages depicted a proportional relationship; however, with the increase of gate voltage this value tended to decline. In the case of transit frequency response, a decrease in channel length resulted in an increase in transit frequency. The threshold voltage dependence on back-gate-source voltage for different dielectrics demonstrated an inverse relationship between the two. The analytical expressions and their implementation through graphical representation for a bilayer graphene channel will be extended to a multilayer channel in the future to improve the device performance.

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Section: Surface Potential Calculation For Bilayer Graphene Fetmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Equivalent Circuit Modeling of a Dual-Gate Graphene FET

2020

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“…Hence, by applying the Drude model, the quantum capacitance, C q , takes into consideration the capacitance due to both the minimum charge and the induced charge into the channel [22,23]. Thus, Eqs.…”

Section: Capacitance Modelmentioning

confidence: 99%

“…This implies that the threshold voltage cannot be optimised [23,12]. Graphene FET threshold voltage is still widely researched [26], whereby it has been reported that chemical doping of the graphene channel can result in a shift of the threshold voltage [26].…”

Section: Capacitance Modelmentioning

confidence: 99%

A circuit model for defective bilayer graphene transistors

Umoh

Moktadir

Hang

et al. 2016

Solid-State Electronics

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a b s t r a c tThis paper investigates the behaviour of a defective single-gate bilayer graphene transistor. Point defects were introduced into pristine graphene crystal structure using a tightly focused helium ion beam. The transfer characteristics of the exposed transistors were measured ex-situ for different defect concentrations. The channel peak resistance increased with increasing defect concentration whilst the on-off ratio showed a decreasing trend for both electrons and holes. To understand the electrical behaviour of the transistors, a circuit model for bilayer graphene is developed which shows a very good agreement when validated against experimental data. The model allowed parameter extraction of bilayer transistor and can be implemented in circuit level simulators.

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“…It has many fascinating properties, such as high thermal conductivity (2000-4000 W m -1 K -1 ) [1-3], high carrier mobility (10 3 -10 5 cm 2 V −1 s −1 ) [4][5][6], high mechanical strength (Young's modulus of ∼1000 GPa) [7], high fracture strength (∼125 GPa) [8], chemical inertness [9][10][11], and lubricity [12][13][14]. A lot of research has implemented graphene as transparent electrodes [15][16][17], field-effect devices [18][19][20], corrosion barriers [21], and micro-and nanoelectromechanical systems [22] with the focus of electrical, thermal, and chemical applications of graphene. The mechanical properties of graphene have not much explored, such as using graphene to reduce friction between dynamic interfaces of metal surface for specific industrial applications discussed as follows.…”

Section: Introductionmentioning

confidence: 99%

Friction force reduction for electrical terminals using graphene coating

Zhang¹,

Arfaei²,

Chen³

2020

Nanotechnology

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Multi-layer graphene, serving as a conductive solid lubricant, is coated on the metal surface of electrical terminals. This graphene layer reduces the wear and the friction between two sliding metal surfaces while maintaining the same level of electrical conduction when a pair of terminals engage. The friction between the metal surfaces was tested under dry sliding in a cyclical insertion process with and without the graphene coating. Comprehensive characterizations were performed on the terminals to examine the insertion effects on graphene using scanning electron microscopy, four-probe resistance characterization, lateral force microscopy, and Raman spectroscopy. With the thin graphene layers grown by plasma enhanced chemical vapor deposition on gold (Au) and silver (Ag) terminals, the insertional forces can be reduced by 74 % and 34 % after the first cycle and 79 % and 32 % after the 10th cycle of terminal engagement compared with pristine Au and Ag terminals. The resistance of engaged terminals remains almost unchanged with the graphene coating. Graphene stays on the terminals to prevent wear-out during the cyclic insertional process and survives the industrial standardized reliability test through high humidity and thermal cycling with almost no change.

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Multilayer Graphene FET Compact Circuit-Level Model With Temperature Effects

Cited by 17 publications

References 32 publications

Equivalent Circuit Modeling of a Dual-Gate Graphene FET

Equivalent Circuit Modeling of a Dual-Gate Graphene FET

A circuit model for defective bilayer graphene transistors

Friction force reduction for electrical terminals using graphene coating

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